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I2C Host Interface
Reset and I2C Bus Address Selection
I2C Operation
Power-up, Reset, and Initialization
TVP7000
SLES143 – SEPTEMBER 2005
Communication with the TVP7000 device is via an I2C host interface. The I2C standard consists of two signals,
serial input/output data (SDA) line and input clock line (SCL), which carry information between the devices
connected to the bus. A third signal (I2CA) is used for slave address selection. Although an I2C system can be
multi-mastered, the TVP7000 can function as a slave device only.
Since SDA and SCL are kept open-drain at logic high output level or when the bus is not driven, the user should
connect SDA and SCL to a positive supply voltage via a pull up resistor on the board. SDA is implemented
bi-directional. The slave addresses select, terminal 73 (I2CA), enables the use of two TVP7000 devices tied to
the same I2C bus since it controls the least significant bit of the I2C device address
Table 2. I2C Host Interface Terminal Description
SIGNAL
TYPE
DESCRIPTION
I2C A
I
Slave address selection
SCL
I
Input clock line
SDA
I/O
Input/output data line
TVP7000 can respond to two possible chip addresses. The address selection is made at reset by an externally
supplied level on the I2C A pin. The TVP7000 device samples the level of terminal 73 at power- up or at the
trailing edge of RESETB and configures the I2C bus address bit A0. The I2C A terminal has an internal pull-down
resistor to pull the terminal low to set a zero.
Table 3. I2C Host Interface Device Addresses
A6
A5
A4
A3
A2
A1
A0 (I2C A)
R/W
HEX
1
0
1
0
0 (default)
1/0
B9/B8
1
0
1
0
1(1)
1/0
BB/BA
(1)
If terminal 73 strapped to DVDD via a 2.2 k
resistor, I2C device address A0 is set to 1.
Data transfers occur utilizing the following illustrated formats.
S
10111000
ACK
subaddress
ACK
send data
ACK
P
Read from I2C control registers
S
10111000
ACK
subaddress
ACK
S
10111001
ACK
receive data
NAK
P
S =
I2C Bus Start condition
P =
I2C Bus Stop condition
ACK =
Acknowledge generated by the slave
NAK =
Acknowledge generated by the master, for multiple byte read master with ACK each byte except last byte
Subaddress =
Subaddress byte
Data =
Data byte, if more than one byte of DATA is transmitted (read and write), the subaddress pointer is automatically
incremented
I2C bus address =
Example shown that I2C A is in default mode. Write (B8h), Read (B9h)
No specific power-up sequence is required, but all power supplies should be active and stable within 500 ms of
each other. Reset may be low during power-up, but must remain low for at least 1
s after the power supplies
become stable. Alternately reset may be asserted any time with minimum 5 ms delay after power-up and must
remain asserted for at least 1
s. Reset timing is shown in Figure 7. It is also recommended that any I2C operation starts 1
s after reset ended.
Table 4 describes the status of the TVP7000 terminals during and
immediately after reset.
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