參數(shù)資料
型號(hào): TVP5154PNPG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP128
封裝: PLASTIC, HTQFP-128
文件頁(yè)數(shù): 13/77頁(yè)
文件大?。?/td> 795K
代理商: TVP5154PNPG4
www.ti.com
9
Internal Control Registers
9.1 Overview
TVP5154
4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER
WITH INDEPENDENT SCALERS AND FAST LOCK
SLES163A – MARCH 2006 – REVISED JULY 2006
Table 8-1. Reset and Power-Down Modes
PDN
RESETB
CONFIGURATION
0
Reserved (undefined state)
0
1
Powers down the decoder
1
0
Resets the decoder
1
Normal operation
The TVP5154 decoder is initialized and controlled by sets of internal registers that set all device operating
parameters. Communication between the external controller and the TVP5154 decoder is through the I2C.
Two sets of registers exist, direct and indirect. Table 9-1 shows the summary of the direct registers.
Reserved registers must not be written. Reserved bits in the defined registers must be written with 0s,
unless otherwise noted. The detailed programming information of each register is described in the
following sections.
I2C register 0xFE controls which of the four decoders receives I2C commands. I2C register 0xFF controls
which decoder core responds to I2C reads. Note, for a read operation, it is necessary to perform a write
first, in order to set the desired sub-address for reading.
After power up and the hardware reset, each decoder must be started by writing 0x00h to register 7Fh for
all four decoders.
Table 9-1. Direct Register Summary
REGISTER FUNCTION
ADDRESS
DEFAULT
R/W(1)
Video input source selection #1
00h
R/W
Analog channel controls
01h
15h
R/W
Operation mode controls
02h
00h
R/W
Miscellaneous controls
03h
01h
R/W
Autoswitch mask
04h
DCh
R/W
Clock control
05h
08h
R/W
Color killer threshold control
06h
10h
R/W
Luminance processing control #1
07h
60h
R/W
Luminance processing control #2
08h
00h
R/W
Brightness control
09h
80h
R/W
Color saturation control
0Ah
80h
R/W
Hue control
0Bh
00h
R/W
Contrast control
0Ch
80h
R/W
Outputs and data rates select
0Dh
47h
R/W
Luminance processing control #3
0Eh
00h
R/W
Configuration shared pins
0Fh
08h
R/W
Reserved
10h
Active video cropping start MSB for unscaled data
11h
00h
R/W
Active video cropping start LSB for unscaled data
12h
00h
R/W
Active video cropping stop MSB for unscaled data
13h
00h
R/W
Active video cropping stop LSB for unscaled data
14h
00h
R/W
Genlock/RTC
15h
01h
R/W
Horizontal sync start
16h
80h
R/W
(1)
R = Read only, W = Write only, R/W = Read and write
Internal Control Registers
20
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