
TVP5151
SLES241C – SEPTEMBER 2009 – REVISED SEPTEMBER 2010
www.ti.com
Table 2-1. Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME
ZQC
PBS
Analog Section
AGND
E1
7
G
Substrate. Connect to analog ground.
Analog input. Connect to the video analog input via 0.1-F capacitor. The maximum input
AIP1A
A1
1
I
range is 0-0.75 VPP, and may require an attenuator to reduce the input amplitude to the
desired level. If not used, connect to AGND via a 0.1-F capacitor (see
Figure 6-1).Analog input. Connect to the video analog input via 0.1-F capacitor. The maximum input
AIP1B
B1
2
I
range is 0-0.75 VPP, and may require an attenuator to reduce the input amplitude to the
desired level. If not used, connect to AGND via a 0.1-F capacitor (see
Figure 6-1).CH_AGND
A3
31
G
Analog ground
CH_AVDD
A2
32
P
Analog supply. Connect to 1.8-V analog supply.
B2, B3,
B6, C4,
C5,
NC
–
No connect
D3–D6,
E2–E5,
F2, F5, F6
PLL_AGND
C2
3
G
PLL ground. Connect to analog ground.
PLL_AVDD
C1
4
P
PLL supply. Connect to 1.8-V analog supply.
A/D reference negative output. Connect to analog ground through a 1-F capacitor. Also, it
REFM
A4
30
O
is recommended to connect directly to REFP through a 1-F capacitor (see
Figure 6-1).
A/D reference positive output. Connect to analog ground through a 1-F capacitor (see
REFP
B4
29
O
External clock reference input. Connect to analog ground if an external single-ended
XTAL1/OSC
D2
5
I
oscillator is connected to AVID/CLK_IN pin.
External clock reference output. Not connected if XTAL1 or CLK_IN is driven by an external
XTAL2
D1
6
O
single-ended oscillator.
Digital Section
Active video indicator output/external clk input
When XTAL1 is used as a reference clock and this terminal is left unconnected, this
terminal is internally pulled down.
When XTAL1 is used as a reference clock and AVID output is required, this pin must be
AVID/CLK_IN
A6
26
I/O
low until terminal is configured as an output. This may be dependent on external circuitry
connected to this terminal.
When XTAL 1 is connected to ground, CLK_IN may be connected to an external
single-ended oscillator from a 1.8-V to 3.3-V compatible clock signal depending on
IO_DVDD voltage.
DGND
E6
19
G
Digital ground
DVDD
E7
20
P
Digital supply. Connect to 1.8-V digital supply.
FID: Odd/even field indicator or vertical lock indicator. For the odd/even indicator, a 1
indicates the odd field.
FID/GLCO
C6
23
O
GLCO: This serial output carries color PLL information. A slave device can decode the
information to allow chrominance frequency control from the TVP5151 decoder. Data is
transmitted at the SCLK rate in Genlock mode. In RTC mode, SCLK/4 is used.
HSYNC
A7
25
O
Horizontal synchronization signal
INTREQ: Interrupt request output
GPCL/VBLK: General-purpose control logic. This terminal has two functions:
INTREQ/GPCL/
GPCL: General-purpose output. In this mode the state of GPCL is directly programmed
B5
27
O
VBLK
via I2C.
VBLK: Vertical blank output. In this mode the GPCL terminal indicates the vertical
blanking interval of the output video. The beginning and end times of this signal are
programmable via I2C.
IO_DVDD
G2
10
P
Digital output supply, 1.8 V to 3.3 V
8
Device Details
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