參數(shù)資料
型號(hào): TVP5146M2PFP
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP80
封裝: GREEN, PLASTIC, HTQFP-80
文件頁(yè)數(shù): 40/107頁(yè)
文件大?。?/td> 949K
代理商: TVP5146M2PFP
SLES141G
– JULY 2005 – REVISED APRIL 2011
2.10 Internal Control Registers
The TVP5146M2 decoder is initialized and controlled by a set of internal registers that define the operating
parameters of the entire device. Communication between the external controller and the TVP5146M2 is
through a standard I2C host port interface, as previously described. Table 2-10 shows the summary of
these registers. Detailed programming information for each register is described in the following sections.
Additional registers are accessible through an indirect procedure involving access to an internal 24-bit
address wide VBUS. Table 2-11 shows the summary of the VBUS registers.
NOTE
Do not write to reserved registers. Reserved bits in any defined register must be written with
zeros, unless otherwise noted.
Table 2-10. I2C Register Summary(1)
I2C
REGISTER NAME
DEFAULT
R/W
SUBADDRESS
Input select
00h
R/W
AFE gain control
01h
0Fh
R/W
Video standard
02h
00h
R/W
Operation mode
03h
00h
R/W
Autoswitch mask
04h
23h
R/W
Color killer
05h
10h
R/W
Luminance processing control 1
06h
00h
R/W
Luminance processing control 2
07h
00h
R/W
Luminance processing control 3
08h
02h
R/W
Luminance brightness
09h
80h
R/W
Luminance contrast
0Ah
80h
R/W
Chrominance saturation
0Bh
80h
R/W
Chroma hue
0Ch
00h
R/W
Chrominance processing control 1
0Dh
00h
R/W
Chrominance processing control 2
0Eh
R/W
Reserved
0Fh
Component Pr saturation
10h
80h
R/W
Component Y contrast
11h
80h
R/W
Component Pb saturation
12h
80h
R/W
Reserved
13h
Component Y brightness
14h
80h
R/W
Reserved
15h
AVID start pixel
16h-17h
055h
R/W
AVID stop pixel
18h-19h
325h
R/W
HSYNC start pixel
1Ah-1Bh
000h
R/W
HSYNC stop pixel
1Ch-1Dh
040h
R/W
VSYNC start line
1Eh-1Fh
004h
R/W
VSYNC stop line
20h-21h
007h
R/W
VBLK start line
22h-23h
001h
R/W
VBLK stop line
24h-25h
015h
R/W
Embedded Sync Offset Control 1
26h
00h
R/W
Embedded Sync Offset Control 2
27h
00h
R/W
(1)
R = Read only, W = Write only, R/W = Read and write
Reserved register addresses must not be written to.
38
Functional Description
Copyright
2005–2011, Texas Instruments Incorporated
Product Folder Link(s): TVP5146M2
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