Data Sheet
23
Revision 3.1, 2006-12-19
TUA 6041-2
LIGHTNING
Functional Description
3.4.4
PLL block, XTAL oscillator
The VCO frequency f
OSC is stabilized by a digital CMOS PLL (Phase Locked Loop,
Frequency Synthesizer). The oscillator signal is internally DC-coupled as a differential
signal to the programmable divider input. The signal subsequently passes through a
programmable divider (N) and then the divided VCO signal:
is compared in a digital frequency/phase detector (PD, frequency detector) with a
programmable reference frequency:
which is derived from a quartz reference f
XTAL divided by a programmable reference
divider (R).
The phase detector has a linear operating range without a dead zone for very small
phase deviations. A programmable ABL pulse width (Anti BackLash) works against the
delay of the charge pump cell. The selectable ABL pulse width values have been
implemented for test purpose only and have no performance effects.
The phase detector has two outputs (up & down) that drive two current sources of
opposite polarity as charge pump (CP). If the negative edge of the divided VCO signal
appears prior to the negative edge of the reference signal, the positive current source
(I
source) pulses for the duration of the phase difference. In the reverse case the negative
current source (I
sink) pulses. If the two signals are in phase (PLL is locked), the integrated
charge pump current is approximately zero. In case of active closed loop control the
charge pump provides programmable output current drive capability to optimize the loop
requirements. The charge pump currents are programmable from 0 to 1.125 mA in steps
of 75 A.
The PLL contains an integrated lock detector. A lock-in flag is set when the loop is
locked. It can be read by the processor via the common I
2C/3-Wire bus.
The crystal oscillator (XTAL) is an unbalanced Pierce oscillator which operates in parallel
resonance with quartz crystals from 4...16 MHz. By programming it’s possible to pass
the oscillator frequency f
XTAL through a divider stage to a buffered output pin or to use an
external quartz clock for the reference oscillator via a switchable preamplifier for test
purpose only.
3.4.5
Bus Interface
The programming of the CMOS frequency synthesizer is done via a combined serial
I
2C/3-Wire bus interface. The choice of the desired bus is made by a bus mode select
signal at pin BUSMODE.
f
div
f
OSC
N
------------
N240
…65535
=
()
,
=
f
ref
f
XTAL
R
---------------
R2
…1023
=
()
,
=