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| 型號(hào)： | TSC2301IPAGG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | GREEN, PLASTIC, TQFP-64 |
| 文件頁(yè)數(shù)： | 69/95頁(yè) |
| 文件大?。?/td> | 1322K |
| 代理商： | TSC2301IPAGG4 |
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N0 ) 2 N1 Z–1 ) N2 Z–2
32768–2 D1 Z–1–D2 Z–2
N3 ) 2 N4 Z–1 ) N5 Z–2
32768–2 D4 Z–1–D5 Z–2
(13)
TSC2301
SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004
Stereo DAC Overview
The stereo DAC consists of a digital block to implement digital interpolation filter, volume control, de-emphasis
filter and programmable digital effects/bass-boost filter for each channel. These are followed by a fifth-order
single-bit digital delta-sigma modulator, and switched capacitor analog reconstruction filter. The DAC has been
designed to provide enhanced performance at low sample rates through increased oversampling and image
filtering, thereby keeping quantization noise generated within the delta-sigma modulator and signal images
strongly suppressed in the full audio band of 20 Hz-20 kHz, even at low sample rates such as 8 kHz. This is
realized by keeping the upsampled rate approximately constant and changing the oversampling ratio as the input
sample rate is reduced. For rates of 8/12/16/24/32/48 kHz, the digital delta-sigma modulator always operates at a
rate of 6.144 MHz, giving oversampling ratios of 768/512/384/256/192/128, respectively. This ensures that
quantization noise generated within the delta-sigma modulator stays low within the frequency band below 20 kHz
at all sample rates. Similarly, for rates of 11.025/22.05/44.1 kHz, the digital delta-sigma modulator always
operates at a rate of 5.6448 MHz, yielding oversampling ratios of 512/256/128, respectively.
Conventional audio DAC designs utilize high-order analog filtering to remove quantization noise that falls within
the audio band when operating at low sample rates. Here, however, the increased oversampling at low sample
rates keeps the noise above 20 kHz, yielding a similar noise floor out to 20 kHz whether the sample rate is 8 kHz
or 48 kHz. If the audio bypass path is not in use when the stereo DAC is in use, the user should power down the
bypass path, as this improves DAC SNR and reduces power consumption.
In addition, the digital interpolation filter provides enhanced image filtering to reduce signal images caused by the
upsampling process that land below 20 kHz. For example, upsampling an 8-kHz signal produces signal images
at multiples of 8 kHz, i.e., 8 kHz, 16 kHz, 24 kHz, etc. The images at 8 kHz and 16 kHz are below 20 kHz and
thus are still audible to the listener, therefore they must be filtered heavily to maintain a good quality output. The
interpolation filter is designed to maintain at least 65-dB rejection of signal images landing between 0.55 Fs and
3.5 Fs, for all sample rates, including any images that land within the audio band (20 Hz-20 kHz). Passband
ripple for all sample-rate cases (from 20 Hz to 0.4535 Fs) is +/-0.1-dB maximum.
The analog reconstruction filter design consists of a switched-capacitor filter with one pole and three zeros. The
single-bit data operates at 128 x 48 kHz = 6.144 MHz (for selected sample-rates that are submultiples of 48 kHz)
or at 128 x 44.1 kHz = 5.6448 MHz (for selected sample-rates that are submultiples of 44.1 kHz). The
interpolation filter takes data at the selected sample-rate from the effects processing block, then performs
upsampling and image filtering, yielding a 6.144-MHz or 5.6448-MHz data stream, which is provided to the digital
delta-sigma modulator.
Audio DAC SNR performance is 98-dB-A typical over 20 Hz–20 kHz bandwidth in 44.1/48-kHz mode at the
line-outputs with a 3.3-V supply level.
DAC Digital De-Emphasis
The DAC digital effects processing block can perform several operations on the audio data before it is passed to
the interpolation filter. One such operation is a digital de-emphasis, which can be enabled or disabled by the user
via the DEEMP bit (Bit 0, Reg 05h, Pg 2). This is only available for sample rates of 32 kHz, 44.1 kHz, and 48
kHz. The transfer function consists of a pole with time constant of 50 s and a zero with time constant of 15 s.
DAC Programmable Digital Effects Filter
The DAC digital effects processing block also includes a fourth order digital IIR filter with programmable
coefficients (independently programmable per channel). The filter transfer function is given by:
The N and D coefficients are set via SPI registers, and this filter can be enabled or disabled via the BASS bit (Bit
1, Reg 05h, Pg 2). This functionality can implement a number of different functions, such as bass-boost (default),
treble-boost, mid-boost, or other equalization. This transfer function(s) can be determined by the user and loaded
to the TSC2301 at power-up, and the feature can then be switched on or off by the user during normal operation.
If a filter with gain over 0 dB is designed and used, and large-scale signals are played at high amplitude through
the DAC, overloading and undesirable effects can occur.
The default coefficients at reset are given by:
71
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSC2301IPAGR | 功能描述:觸摸屏轉(zhuǎn)換器和控制器 Prog 4-Wire w/20-Bit Stereo Audio Codec RoHS:否 制造商:Microchip Technology 類(lèi)型:Resistive Touch Controllers 輸入類(lèi)型:3 Key 數(shù)據(jù)速率:140 SPS 分辨率:10 bit 接口類(lèi)型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 電源電壓:2.5 V to 5.25 V 電源電流:17 mA 工作溫度:- 40 C to + 85 C 封裝 / 箱體:SSOP-20 |
| TSC2301IPAGRG4 | 功能描述:觸摸屏轉(zhuǎn)換器和控制器 Prog 4-Wire w/20-Bit Stereo Audio Codec RoHS:否 制造商:Microchip Technology 類(lèi)型:Resistive Touch Controllers 輸入類(lèi)型:3 Key 數(shù)據(jù)速率:140 SPS 分辨率:10 bit 接口類(lèi)型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 電源電壓:2.5 V to 5.25 V 電源電流:17 mA 工作溫度:- 40 C to + 85 C 封裝 / 箱體:SSOP-20 |
| TSC2301IZQZ | 功能描述:觸摸屏轉(zhuǎn)換器和控制器 Prog 4-Wire w/20-Bit Stereo Audio Codec RoHS:否 制造商:Microchip Technology 類(lèi)型:Resistive Touch Controllers 輸入類(lèi)型:3 Key 數(shù)據(jù)速率:140 SPS 分辨率:10 bit 接口類(lèi)型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 電源電壓:2.5 V to 5.25 V 電源電流:17 mA 工作溫度:- 40 C to + 85 C 封裝 / 箱體:SSOP-20 |
| TSC2301IZQZR | 功能描述:觸摸屏轉(zhuǎn)換器和控制器 Prog 4-Wire w/20-Bit Stereo Audio Codec RoHS:否 制造商:Microchip Technology 類(lèi)型:Resistive Touch Controllers 輸入類(lèi)型:3 Key 數(shù)據(jù)速率:140 SPS 分辨率:10 bit 接口類(lèi)型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 電源電壓:2.5 V to 5.25 V 電源電流:17 mA 工作溫度:- 40 C to + 85 C 封裝 / 箱體:SSOP-20 |
| TSC2301PAG | 制造商:TI 制造商全稱:Texas Instruments 功能描述:PROGRAMMABLE TOUCH SCREEN CONTROLLER WITH STEREO AUDIO CODEC |
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