- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98301 > TSA1041IF (STMICROELECTRONICS) 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 PDF資料下載
參數(shù)資料
| 型號： | TSA1041IF |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | ADC |
| 英文描述： | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | 7 X 7 MM, TQFP-48 |
| 文件頁數(shù)： | 3/14頁 |
| 文件大小： | 287K |
| 代理商： | TSA1041IF |
11/14
TSA1041 APPLICATION NOTE
Detailed information:
The TSA1041 contains four High Speed Analog to
Digital converters, able to convert simultaneously
four differential inputs. Each of the single ADC is
based on a pipeline architecture implemented in a
submicron CMOS process to achieve the best
performances in terms of linearity and power
consumption.
To ease the application, the TSA1041 provides
common internal references and a common
mode, related to all channels. External references
can also be applied to adjust the input scale
according application needs and improve dynamic
performances.
A PLL and one serializer per channel are
integrated in the design of the TSA1041 to allow
the serialization of the 10-bits wide data output
per channel. At these high data bits rate
(500Mbits/s for a sampling frequency at 50Msps),
the data transmission is done through single
differential LVDS buses. The use of LVDS output
buffers allows to reduce I/O noise and optimize
the
ratio’number
of
channels/consumption’,
compared
to
CMOS
parallel
output
buses.
Moreover it allows to reduce board size and
simplify PCB layout.
At
50Msps
sampling
frequency
the
overall
consumption of the four-channels TSA1041 is
only 440mW
Operating modes:
Mode Ref ext/int (REFMODE):
When REFMODE is let to 0, the TSA1041 uses
the internal reference voltages to set up the
dynamic range for the four channels. When
REFMODE is set to 1, external references
VREFP and VINCM must be applied to adjust the
dynamic range.
Power Down Device (PDD):
When PDD is set to low level, the device is active.
When set to high level the circuit is inactive.
Test Pattern (SYNCMODE):
An internal register in the TSA1041 delivers a
Synchronization pattern (1000101010) to secure
the data transmission between the 4-channels.
When the CMOS input SYNCMODE is high, the
Synchronization pattern is delivered at the output
of the TSA1041.
Data Synchronization (SCLK, FCLK):
The TSA1041 delivers the Serial-Clock (5 times
the sampling frequency Fs, edges on middle of
data) and the Frame-Clock (same frequency as
the sampling clock, edges aligned with data) for
deserialization (see figure.’Detailed timing’ p6).
The serial clock SCLK can be used with DDR
(double data registers) to deserialize on both
rising and falling edge of the SCLK. The first bit is
detected
by
using
the
FCLK
or
the
synchronization pattern.
For
systems
integrating
SERDES,
the
deserialisation is done by using the frame clock
FCLK.
Data Serialization (LOCK):
An internal PLL and a serializer serialize the 10-bit
wide output data.
Before the internal PLL of the TSA1041 is locked
on the sampling frequencyx10, the CMOS output
LOCK remains low. When the internal PLL is
locked, the output LOCK goes high.
For a proper use of the LOCK and if the sampling
frequency varies during operation it is strongly
advised to put the device on power-down before
increasing/cdecreasing the sampling frequency.
If
the
sampling
frequency
is
50MHz,
the
transmitted
data
bit rate
is
500Mbps.
The
serialization provides first MSB(D9), D8...D1, and
at the end LSB(D0).
Power adaptation vs Fs (SPEED):
The power consumption of the device may be
optimized versus the sampling frequency with one
相關PDF資料 |
PDF描述 |
|---|---|
| TSA1201IF | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| TSA1201IFT | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| TSA1203IFT | 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QFP48 |
| TSA1203IF | 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QFP48 |
| TSA1203IFT-E | 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QFP48 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TSA11 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EURO TERMINAL BLOCKS |
| TSA12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EURO TERMINAL BLOCKS |
| TSA120013 | 制造商:Panasonic Industrial Company 功能描述:ANTENNA |
| TSA120022 | 制造商:Panasonic Industrial Company 功能描述:ANTENNA |
| TSA120024-1 | 制造商:Panasonic Industrial Company 功能描述:SUB ONLY ANTENNA |
發(fā)布緊急采購，3分鐘左右您將得到回復。