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參數(shù)資料
| 型號(hào)： | TSA1001IFT |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | 7 X 7 MM, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 218K |
| 代理商： | TSA1001IFT |
TSA1001
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Layout precautions
To use the ADC circuits in the best manner at high
frequencies, some precautions have to be taken
for power supplies:
- First of all, the implementation of 4 separate
proper supplies and ground planes (analog,
digital, internal and external buffer ones) on the
PCB is recommended for high speed circuit
applications to provide low inductance and low
resistance common return.
The separation of the analog signal from the
digital part is essential to prevent noise from
coupling onto the input signal.
- Power supply bypass capacitors must be placed
as close as possible to the IC pins in order to
improve high frequency bypassing and reduce
harmonic distortion.
- Proper termination of all inputs and outputs must
be incorporated with output termination resistors;
then the amplifier load will be only resistive and
the stability of the amplifier will be improved. All
leads must be wide and as short as possible
especially for the analog input in order to decrease
parasitic capacitance and inductance.
- To keep the capacitive loading as low as
possible at digital outputs, short lead lengths of
routing are essential to minimize currents when
the output changes. To minimize this output
capacitance, buffers or latches close to the output
pins will relax this constraint.
- Choose component sizes as small as possible
(SMD).
EVAL1001 evaluation board
The characterization of the board has been made
with a fully ADC devoted test bench as shown on
Figure 10. The analog signal must be filtered to be
very pure.
The dataready signal is the acquisition clock of the
logic analyzer.
The ADC digital outputs are latched by the octal
buffers 74LCX573.
All characterization measurements have been
made with:
SFSR=+0.2dB for static parameters.
SFSR=-0.5dB for dynamic parameters.
Figure 10 : Analog to Digital Converter characterization bench
Sine Wave
Generator
HP8644
ADC
evaluation
board
Pulse
Generator
Logic
Analyzer
Sine Wave
Generator
HP8644
HP8133
Vin
Clk
Data
Clk
PC
相關(guān)PDF資料 |
PDF描述 |
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| TSA1001CF | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| TSA1002CFT | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| TSA1002CF | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| TSA1002IF | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| TSA1002IFT | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSA1002 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:10-BIT, 50MSPS, 50mW A/D CONVERTER |
| TSA1002_04 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:10-BIT, 50MSPS, 50mW A/D CONVERTER |
| TSA1002CF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:10-BIT, 50MSPS, 50mW A/D CONVERTER |
| TSA1002CFT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:10-BIT, 50MSPS, 50mW A/D CONVERTER |
| TSA1002IF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:10-BIT, 50MSPS, 50mW A/D CONVERTER |
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