• 參數(shù)資料
    型號: TS87C51RD2-VCE
    廠商: Atmel
    文件頁數(shù): 20/84頁
    文件大?。?/td> 0K
    描述: IC MCU 8BIT 64K OTP 40MHZ 44VQFP
    標(biāo)準(zhǔn)包裝: 160
    系列: 87C
    核心處理器: 8051
    芯體尺寸: 8-位
    速度: 40/30MHz
    連通性: UART/USART
    外圍設(shè)備: POR,PWM,WDT
    輸入/輸出數(shù): 32
    程序存儲器容量: 64KB(64K x 8)
    程序存儲器類型: OTP
    RAM 容量: 1K x 8
    電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
    振蕩器型: 內(nèi)部
    工作溫度: 0°C ~ 70°C
    封裝/外殼: 44-QFP
    包裝: 托盤
    2007-2012 Microchip Technology Inc.
    DS70292G-page 29
    dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
    REGISTER 3-2:
    CORCON: CORE CONTROL REGISTER
    U-0
    R/W-0
    R-0
    —US
    EDT(1)
    DL<2:0>
    bit 15
    bit 8
    R/W-0
    R/W-1
    R/W-0
    R/C-0
    R/W-0
    SATA
    SATB
    SATDW
    ACCSAT
    IPL3(2)
    PSV
    RND
    IF
    bit 7
    bit 0
    Legend:
    C = Clear only bit
    R = Readable bit
    W = Writable bit
    -n = Value at POR
    ‘1’ = Bit is set
    0’ = Bit is cleared
    ‘x = Bit is unknown
    U = Unimplemented bit, read as ‘0’
    bit 15-13
    Unimplemented: Read as ‘0’
    bit 12
    US: DSP Multiply Unsigned/Signed Control bit
    1 = DSP engine multiplies are unsigned
    0 = DSP engine multiplies are signed
    bit 11
    EDT: Early DO Loop Termination Control bit(1)
    1 = Terminate executing DO loop at end of current loop iteration
    0 = No effect
    bit 10-8
    DL<2:0>: DO Loop Nesting Level Status bits
    111 = 7 DO loops active
    001 = 1 DO loop active
    000 = 0 DO loops active
    bit 7
    SATA: ACCA Saturation Enable bit
    1 = Accumulator A saturation enabled
    0 = Accumulator A saturation disabled
    bit 6
    SATB: ACCB Saturation Enable bit
    1 = Accumulator B saturation enabled
    0 = Accumulator B saturation disabled
    bit 5
    SATDW: Data Space Write from DSP Engine Saturation Enable bit
    1 = Data space write saturation enabled
    0 = Data space write saturation disabled
    bit 4
    ACCSAT: Accumulator Saturation Mode Select bit
    1 = 9.31 saturation (super saturation)
    0 = 1.31 saturation (normal saturation)
    bit 3
    IPL3: CPU Interrupt Priority Level Status bit 3(2)
    1 = CPU interrupt priority level is greater than 7
    0 = CPU interrupt priority level is 7 or less
    bit 2
    PSV: Program Space Visibility in Data Space Enable bit
    1 = Program space visible in data space
    0 = Program space not visible in data space
    bit 1
    RND: Rounding Mode Select bit
    1 = Biased (conventional) rounding enabled
    0 = Unbiased (convergent) rounding enabled
    bit 0
    IF: Integer or Fractional Multiplier Mode Select bit
    1 = Integer mode enabled for DSP multiply ops
    0 = Fractional mode enabled for DSP multiply ops
    Note 1: This bit is always read as ‘0’.
    2: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.
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