參數(shù)資料
型號(hào): TS87C51RC2-VCB
廠商: International Rectifier
英文描述: High Performance 8-bit Microcontroller
中文描述: 高性能8位微控制器
文件頁(yè)數(shù): 20/85頁(yè)
文件大?。?/td> 762K
代理商: TS87C51RC2-VCB
20
4188E–8051–08/06
AT/TS8xC51Rx2
Figure 6-2.
Auto-reload Mode Up/Down Counter (DCEN = 1)
6.2.2
Programmable Clock-Output
In the clock-out mode, timer 2 operates as a 50%-duty-cycle, programmable clock generator
(See Figure 6-3) . The input clock increments TL2 at frequency F
OSC
/2. The timer repeatedly
counts to overflow from a loaded value. At overflow, the contents of RCAP2H and RCAP2L reg-
isters are loaded into TH2 and TL2. In this mode, timer 2 overflows do not generate interrupts.
The formula gives the clock-out frequency as a function of the system oscillator frequency and
the value in the RCAP2H and RCAP2L registers:
For a 16 MHz system clock, timer 2 has a programmable frequency range of 61 Hz
(F
OSC
/2
16)
to 4 MHz (F
OSC
/4). The generated clock signal is brought out to T2 pin (P1.0).
Timer 2 is programmed for the clock-out mode as follows:
Set T2OE bit in T2MOD register.
Clear C/T2 bit in T2CON register.
Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L
registers.
Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the reload value
or a different one depending on the application.
To start the timer, set TR2 run control bit in T2CON register.
(DOWN COUNTING RELOAD VALUE)
FFh
(8-bit)
C/T2
T2CONreg
TF2
TR2
T2
EXF2
TH2
(8-bit)
TL2
(8-bit)
RCAP2H
(8-bit)
RCAP2L
(8-bit)
(UP COUNTING RELOAD VALUE)
FFh
(8-bit)
TOGGLE
TIMER 2
INTERRUPT
XTAL1
:12
F
OSC
F
XTAL
0
1
T2CONreg
T2CONreg
T2CONreg
T2EX:
if DCEN=1, 1=UP
if DCEN=1, 0=DOWN
if DCEN = 0, up
counting
(:6 in X2 mode)
Clock
OutFrequency
RCAP
2
H
4
----------------------------------------------------------------------------------------
65536
RCAP
2
L
)
=
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