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| 型號： | TS83110MZT |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDFP28 |
| 封裝： | CERAMIC, DFP-28 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大小： | 550K |
| 代理商： | TS83110MZT |
TS83110
8/16
15. DEFINITION OF TERMS
(BW)
Analog bandwidth
The analog input frequency at which the fundamental component in the recon-
structed output has fallen by 3 dB with respect to its low frequency value (deter-
mined by FFT analysis).
(BER)
Bit error rate
Probability to exceed a specified error threshold for a sample.
(DG)
Differential gain
Gain variation for 5 steps analog input.
(DNL)
Differential non
linearity
The differential non linearity for an output code i is the difference between the mea-
sured step size of code i and the ideal LSB step size. DNL (i) is expressed in LSBs.
DNL is the maximum value of all DNL (i). DNL error specification of less than 1 LSB
guarantees that there are no missing output codes and that the transfer function
is monotonic.
(DP)
Differential phase
Phase variation for 5 steps analog input.
(INL)
Integral non linearity
The integral non linearity for an output code i is the difference between the mea-
sured input voltage at which the transition occurs and the ideal value of this transi-
tion.
INL (i) is expressed in LSBs, and is the maximum value of all
|INL (i)|.
(JITTER) Aperture uncertainty
The sample to sample variation in aperture delay. The voltage error due to jitter
depends on the slew rate of the signal at the sampling point.
(NRZ)
Non return to zero
If VIN exceeds positive full scale (+3 V), output data remain at high level (Non
Return to Zero).
(ORT)
Overvoltage recov-
ery time
Time to recover at the output when a step is applied on the input from 150 % full
scale to 50 % full scale.
(PSRR)
Power supply
rejection ratio
PSRR is the ratio of input offset variation to a change in power supply voltage.
(SINAD)
Signal to noise and
distortion ratio
The ratio of the signal amplitude to the sum of all other spectral components,
including the five most significant harmonics except DC.
(SNR)
Signal to noise ratio
The ratio of signal amplitude to the sum of all other spectral components, without
harmonics.
(TA)
Aperture delay
The delay between the rising edge of CLK signal (50 % point) and the time at which
VIN is sampled.
(THD)
Total harmonic
distorsion
The ratio of the five most significant harmonic components in the spectrum of the
quantized representation, to the fundamental spectral component.
(TOD)
Output delay
The delay from the falling edge of CLK (50% point) to the VOH = 2 V or VOL = 0.8 V
of the digital outputs with 10 pF max load.
(TR)
Transient response
Time delay to obtain at the output when a step of 0.9 V is applied on the input.
(NAP)
Nap mode
The nap mode allows to save power consumption (I = 8 mA) and can be activated
on high logic level when the converter is not used.
(TS)
Tristate
The tristate mode allows to set output buffers in high impedance. In this configura-
tion, outputs from different circuits can be connected on the same bus.
相關(guān)PDF資料 |
PDF描述 |
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| TS83110VZT | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDFP28 |
| TS83110MZB/T | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDSO28 |
| TS83110VS | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TS83110VZ | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDSO28 |
| TS83110MZTB/T | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDFP28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS831-3I | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MICROPOWER VOLTAGE SUPERVISOR RESET ACTIVE LOW |
| TS831-3ID | 功能描述:監(jiān)控電路 2.71V Micropower AL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TS831-3IDT | 功能描述:監(jiān)控電路 2.71V Micropower AL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TS831-3IP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MICROPOWER VOLTAGE SUPERVISOR RESET ACTIVE LOW |
| TS831-3IPT | 功能描述:監(jiān)控電路 2.71V Micropower AL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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