參數(shù)資料
型號: TS83110CZT
廠商: ATMEL CORP
元件分類: ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDFP28
封裝: CERAMIC, DFP-28
文件頁數(shù): 14/16頁
文件大小: 550K
代理商: TS83110CZT
TS83110
7/16
13. PIN DESCRIPTION
Pin
Name
Function
1, 2, 4, 11, 14, 12, 21
GND
Ground
3, 10
AVCC
Analog +5 V power supply
5
VOUT
Internal bandgap voltage reference (nominally + 2.5 V)
6
VREF
Non-inverting input to reference amplifier. ADC voltage reference is con-
nected here. VREF must be decoupled with 100 nF capacitor
7
TS
Tristate function : active on high logic level
8
NAP
Power down function : active on high logic level
Full functionality recovered after max 10 clock cycles (TBC)
9
CLK
TTL encode clock input to ADC. Internal T/H is placed in hold mode
(ADC is encoding) on rising edge of encode signal
13
VIN
Analog input
15
OR
Over range condition output. OR set to high level when analog input
exceeds input range of ADC (< -FS or > + FS) - NRZ mode
16
D9 (MSB)
Most significant bit ; TTL output
17, 20
D8 - D5
Digital TTL output bits
22
DGND
Digital ground
23
DVCC
Digital +5 V power supply
24 - 27
D4 - D1
Digital TTL output bits
28
D0 (LSB)
Least significant bit ; TTL output
14. PIN CONNECTION FOR SOIC 28 / CDFP 28
28
27
26
25
24
23
22
21
1
2
3
4
5
6
7
8
D0 (LSB)
D1
D2
D3
D4
DVCC
DGND
GND
AVCC
GND
VOUT
VREF
TS
NAP
TOP VIEW
(not to scale)
TS83110
9
10
11
12
GND
20
19
18
17
D5
D6
D7
D8
CLK
AVCC
13
14
VIN
GND
16
15
D9 (MSB)
OR
相關PDF資料
PDF描述
TS83110MZT 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDFP28
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相關代理商/技術參數(shù)
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