參數(shù)資料
型號(hào): TS80C51RD2-VCE
廠商: International Rectifier
英文描述: High Performance 8-bit Microcontroller
中文描述: 高性能8位微控制器
文件頁(yè)數(shù): 19/85頁(yè)
文件大?。?/td> 762K
代理商: TS80C51RD2-VCE
19
4188E–8051–08/06
AT/TS8xC51Rx2
6.2
Timer 2
The timer 2 in the
TS80C51RX2
is compatible with the timer 2 in the 80C52.
It is a 16-bit timer/counter: the count is maintained by two eight-bit timer registers, TH2 and TL2,
connected in cascade. It is controlled by T2CON register (See Table 6-2) and T2MOD register
(See Table 6-3). Timer 2 operation is similar to Timer 0 and Timer 1. C/T2 selects F
OSC
/12 (timer
operation) or external pin T2 (counter operation) as the timer clock input. Setting TR2 allows TL2
to be incremented by the selected input.
Timer 2 has 3 operating modes: capture, autoreload and Baud Rate Generator. These modes
are selected by the combination of RCLK, TCLK and CP/RL2 (T2CON), as described in the
Atmel 8-bit Microcontroller Hardware description.
Refer to the Atmel 8-bit Microcontroller Hardware description for the description of Capture and
Baud Rate Generator Modes.
In
TS80C51RX2
Timer 2 includes the following enhancements:
Auto-reload mode with up or down counter
Programmable clock-output
6.2.1
Auto-reload Mode
The auto-reload mode configures timer 2 as a 16-bit timer or event counter with automatic
reload. If DCEN bit in T2MOD is cleared, timer 2 behaves as in 80C52 (refer to the Atmel 8-bit
Microcontroller Hardware description). If DCEN bit is set, timer 2 acts as an Up/down
timer/counter as shown in Figure 6-2. In this mode the T2EX pin controls the direction of count.
When T2EX is high, timer 2 counts up. Timer overflow occurs at FFFFh which sets the TF2 flag
and generates an interrupt request. The overflow also causes the 16-bit value in RCAP2H and
RCAP2L registers to be loaded into the timer registers TH2 and TL2.
When T2EX is low, timer 2 counts down. Timer underflow occurs when the count in the timer
registers TH2 and TL2 equals the value stored in RCAP2H and RCAP2L registers. The under-
flow sets TF2 flag and reloads FFFFh into the timer registers.
The EXF2 bit toggles when timer 2 overflows or underflows according to the the direction of the
count. EXF2 does not generate any interrupt. This bit can be used to provide 17-bit resolution.
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