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參數(shù)資料
| 型號： | TS80C51RA2-VCE |
| 廠商： | International Rectifier |
| 英文描述： | High Performance 8-bit Microcontroller |
| 中文描述： | 高性能8位微控制器 |
| 文件頁數(shù)： | 27/85頁 |
| 文件大小： | 762K |
| 代理商： | TS80C51RA2-VCE |
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27
4188E–8051–08/06
AT/TS8xC51Rx2
Figure 6-5.
PCA Interrupt System
PCA Modules:
each one of the five compare/capture modules has six possible functions. It can
perform:
16-bit Capture, positive-edge triggered,
16-bit Capture, negative-edge triggered,
16-bit Capture, both positive and negative-edge triggered,
16-bit Software Timer,
16-bit High Speed Output,
8-bit Pulse Width Modulator.
In addition, module 4 can be used as a Watchdog Timer.
Each module in the PCA has a special function register associated with it. These registers are:
CCAPM0 for module 0, CCAPM1 for module 1, etc. (See Table 6-6). The registers contain the
bits that control the mode that each module will operate in.
The ECCF bit (CCAPMn.0 where n=0, 1, 2, 3, or 4 depending on the module) enables the
CCF flag in the CCON SFR to generate an interrupt when a match or compare occurs in the
associated module.
PWM (CCAPMn.1) enables the pulse width modulation mode.
The TOG bit (CCAPMn.2) when set causes the CEX output associated with the module to
toggle when there is a match between the PCA counter and the module's capture/compare
register.
The match bit MAT (CCAPMn.3) when set will cause the CCFn bit in the CCON register to be
set when there is a match between the PCA counter and the module's capture/compare
register.
The next two bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5) determine the edge that a
capture input will be active on. The CAPN bit enables the negative edge, and the CAPP bit
enables the positive edge. If both bits are set both edges will be enabled and a capture will
occur for either transition.
CF
CR
CCON
0xD8
CCF4 CCF3
CCF2
CCF1
CCF0
Module 4
Module 3
Module 2
Module 1
Module 0
ECF
PCA Timer/Counter
ECCFn CCAPMn.0
CMOD.0
IE.6
EC
IE.7
EA
To Interrupt
priority decoder
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