參數(shù)資料
型號: TS4975EIJT
廠商: STMICROELECTRONICS
元件分類: 音頻控制
英文描述: 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PBGA12
封裝: LEAD FREE, FLIP CHIP, 12 PIN
文件頁數(shù): 18/36頁
文件大小: 870K
代理商: TS4975EIJT
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
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Product(s)
TS4975
Application Information
25/36
Table 14.
IC control byte states
4.1.3
Acknowledge
The number of data bytes transferred between the start and the stop conditions from the CPU
master to the TS4975 slave is not limited. Each byte of eight bits is followed by one
acknowledge bit.
The TS4975 which is addressed, generates an acknowledge after the reception of each byte
that has been clocked out.
4.2
Output configuration
When the device is switched to Mode 5,6,7 or 8, where one channel is in shutdown, it means
that corresponding output is in a high impedance state.
4.2.1
Single-ended configuration
When the device is woken-up or switched via IC interface to SE configuration, output amplifiers
are biased to the VCC/2 voltage and this voltage is present on OUT1 and OUT2 pins. Pins
PHG1 and PHG2 are in high impedance state. In this configuration an output capacitor, Cout, on
each output is needed to block the VCC/2 voltage and couples the audio signal to the load.
4.2.2
Phantom ground configuration
In a PHG configuration the internal buffers are connected to PHG1 and PHG2 pins and biased
to the VCC/2 voltage. Output amplifiers (pins OUT1 and OUT2) are also biased to the VCC/2
voltage. Therefore, no output capacitors are needed. The advantage of the PHG configuration
is the need for fewer external components as compared with a SE configuration. However, note
that the device has higher power dissipation (see
Section 4.3: Power dissipation and efficiency
on page 26).
In this configuration, PHG1 and PHG2 pins must be shorted and the connection between these
pins should be as short as possible. For best crosstalk results, in this case, each speaker
should be connected with a separate PHG wire (2 speakers connected with 4 wires) as shown
in
Figure 2: Phantom ground output configuration on page 4. You should avoid using only one
common PHG wire for both speakers (i.e. 2 speakers connected with 3 wires), which would give
much poorer crosstalk results.
4.2.3
Shutdown
When the device goes to shutdown from SE or PHG mode, PHG1 and PHG2 outputs are in a
high impedance state and OUT1 and OUT2 outputs are shorted together and connected to
bias voltage. This voltage steadily decreases as the bypass capacitor Cb discharges, and
reaches GND voltage when Cbypass is fully discharged. This output configuration is
implemented to reach the best pop performance during chip wake-up.
D7
(MSB)
D6
D5
D4
D3
D2
D1
D0
1
x
X
Undefined State
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