參數(shù)資料
型號(hào): TS3V556IDT
廠商: STMICROELECTRONICS
元件分類(lèi): 模擬波形發(fā)生器
英文描述: DUAL PULSE; RECTANGULAR, 2 MHz, TIMER, PDSO14
封裝: MICRO, PLASTIC, SO-14
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 104K
代理商: TS3V556IDT
TS3V556
5/8
Do
no
t u
se
for
new
design
TYPICAL CHARACTERISTICS
Figure 1 : Supply Current (each timer) versus
Supply Voltage
APPLICATION INFORMATION
MONOSTABLE OPERATION
In the monostable mode,the timer functions as a
one-shot. Referring to figure 2 the external capac-
itor is initially held discharged by a transistor in-
side the timer.
Figure 2 :
The circuit triggers on a negative-going input sig-
nal when the level reaches 1/3 VCC. Once trig-
gered,the circuit remains in this state until the set
time has elapsed,even if it is triggered again dur-
ing this interval. The duration of the output HIGH
state is given by t = 1.1 R x C.
Notice that since the charge rate and the threshold
level of the comparator are both directly propor-
tional to supply voltage, the timing interval is inde-
pendent of supply. Applying a negative pulse si-
multaneously to the Reset terminal (pin 4 or 10)
and the Trigger terminal (pin 2 or 8) during the tim-
ing cycle discharges the external capacitor and
causes the cycle to start over. The timing cycle
now starts on the positive edge of the reset pulse.
During the time the reset pulse is applied, the out-
put is driven to its LOW state.
When a negative trigger pulse is applied to the
trigger terminal, the flip-flop is set, releasing the
short circuit across the external capacitor and driv-
ing the output HIGH. The voltage across the ca-
pacitor increases exponentially with the time con-
stant
τ = R x C.
When the voltage across the capacitor equals 2/3
VCC, the comparator resets the flip-flop which then
discharges the capacitor rapidly and drives the
output to its LOW state.
Figure 3 shows the actual waveforms generated in
this mode of operation.
When Reset is not used, it should be tied high to
avoid any possible or false triggering.
Figure 3 :
CC
SUPPLY VOLTAGE, V
(V)
CC
S
U
P
L
Y
C
U
R
E
N
T,
I
(
A
)
300
200
100
0
4
8
12
16
VCC
Reset
Trigger
Out
R
C
Control Voltage
0.01 F
1/2
TS3V556
CAPACITOR VOLTAGE = 2.0V/div
t = 0.1 ms / div
INPUT = 2.0V/div
OUTPUT VOLTAGE = 5.0V/div
R = 9.1k , C = 0.01 F , R = 1.0k
L
Do
no
t u
se
for
new
design
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