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參數(shù)資料
| 型號(hào)： | TRF2050PW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO20 |
| 封裝： | PLASTIC, SO-20 |
| 文件頁數(shù)： | 15/34頁 |
| 文件大?。?/td> | 543K |
| 代理商： | TRF2050PW |
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TRF2050
LOW-VOLTAGE 1.2-GHz FRACTIONAL-N/INTEGER-N SYNTHESIZER
SLWS030E– JUNE 1996 – REVISED OCTOBER 2000
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
main divider – general (see Figure 20)
The differential RFIN inputs are amplified to internal ECL logic levels and provide excellent sensitivity (better
than –20 dBm at 1 GHz), making the prescaler ideally suited for direct interface with a VCO. The internal
dual-modulus (32/33) prescaler and counter sections divide the VCO frequency down to the reference phase
detector frequency. The prescaler division ratio (
÷32 or ÷33) is controlled by a feedback signal that is a function
of the 18-bit N-field counters. The N-field counter section is composed of two separate counters: a 5-bit
A-Counter and a 13-bit B-Counter. The prescaler divides by 33 until the A-Counter reaches terminal count and
then divides by 32 until the B-Counter reaches terminal count, whereupon both counters reset and the cycle
repeats. The following equation relates the total N division as a function of the 32/33 prescaler:
NTotal = 32 (B – A) + 33(A), where 0 ≤ A ≤ 31, and 31 ≤ B ≤ 8191.
It is not necessary to determine the values of A and B in the equation above; simply program the N field with
the total division ratio desired (fractional effects ignored).
The N-division ratio has a range of 992
≤ NTotal ≤ 262143.
32/33 Prescaler
13-Bit
B-Counter
5-Bit
A-Counter
18-Bit Register
13
5
18-Bit
Adder
18
5-Bit
Fraction Accumulator
18
4
5
5 Bits
13 Bits
N
A
B
LSB
MSB
Structure of N-Word
RFIN
N
NF
FMOD
to Phase Detector
Figure 20. Main Divider Organization
main divider – SA7025 emulation
The internal triple modulus prescaler configuration of the SA7025 provides for prescaler division ratios of
64/65/72. The TRF2050 has internal conversion logic that allows the TRF2050 to emulate the SA7025 main
divider operation. When operated in SA7025 emulation mode, the TRF2050 is programmed using the SA7025
serial interface format shown in Figure 18. The TRF2050 internal conversion is transparent and need not be
considered under normal use, thereby allowing use of existing SA7025 programming codes without change.
The following equations relate the total N-division as a function of the emulated 64/65 dual-modulus and
64/65/72 triple-modulus prescalers:
NTotal = 64 (NM1 + 2) + 65 (NM2), where PR = 01 and
NTotal = 64 (NM1 + 2) + 65 (NM2) + 72 (NM3 + 1), where PR = 10.
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