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參數(shù)資料
| 型號(hào)： | TPU3050PO |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 圖文 |
| 英文描述： | TELETEXT DECODER, PDIP52 |
| 封裝： | SHRINK, PLASTIC, DIP-52 |
| 文件頁數(shù)： | 6/72頁 |
| 文件大?。?/td> | 576K |
| 代理商： | TPU3050PO |
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TPU 3035, TPU 3040, TPU 3050
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
14
Pin 42 and 44 – VIN1 and VIN2 Analog Video Inputs
(Fig. 3–16)
The analog input signals carrying text data are fed to the
TPU 3040 via a clamping capacitor of 33 nF to these
pins.
Pin 43 – SGND Signal Ground
The lower end of the internal reference chain of the A/D
converter is internally connected to the pin 43.
3.3.1. Pin Descriptions TPU 3050
(pin numbers refer to 52-pin PSDIP package)
Pin 33 – PVSUP Pad Supply Voltage
This pin supplies all SRAM interface pads and has to be
connected with the positive supply voltage.
Pin 32 – PGND Pad Ground
This pin is the common ground connection of all SRAM
interface pads and has to be connected with the ground
of the power supply.
Pin 1, 2, 45 to 48, 50, 52 – D0 to D7 SRAM Data Input/
Output (Fig. 3–9)
These pins serve as output for writing data into the exter-
nal SRAM and as input for reading data from the external
SRAM.
Pins 7 to 18 – A0 to A16 SRAM Address Outputs
(Figs. 3–9 and 3–10)
These pins are used for addressing the external SRAM.
The addressing is compatible to all SRAM sizes from
64K to 1M. Therefore, the correct connection of pins A11
to A16 to the corresponding SRAM pins is necessary.
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