參數(shù)資料
型號: TPU3050PK
元件分類: 圖文
英文描述: TELETEXT DECODER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 18/72頁
文件大?。?/td> 347K
代理商: TPU3050PK
TPU 3035, TPU 3040, TPU 3050
PRELIMINARY DATA SHEET
25
Micronas
3.6.16. SRAM Interface Characteristics (TPU 3050 only)
Symbol
Parameter
Pin No.
PSDIP 52
Min.
Typ.
Max.
Unit
Test Conditions
VIL
Input Low Voltage
1,2
45 to 48
0.8
V
VIH
Input High Voltage
45 to 48
50,52
2.0
V
VOL
Output Low Voltage
1,2,24
27 to 31
0.4
V
IL = 1.6 mA
VOH
Output High Voltage
34 to 50
52
2.4
V
IL = *0.5 mA
tT
Output Transition Time
5
10
ns
CL = 15 pF
VOL(max) VOH(min)
3.6.16.1. SRAM Mode Timing at fCLK = 20.25 MHz
Symbol
Parameter
Pin No.
PSDIP 52
Min.
Typ.
Max.
Unit
Test Conditions
tRC
tWC
Read / Write Cycle Time
24
27 to 31
34 to 44
889
ns
SRAM:
tRC
> 100
SRAM:
tWC
> 100
tAS
Address Setup Time
24
27 to 31
444
ns
SRAM:
tAS
>0
tAW
Address Valid to End of Write
27 to 31
34 to 44
49
543
ns
SRAM:
tAW
>90
tWR
Write Recovery Time
49
593
ns
SRAM:
tWR
>5
tWP
Write Pulse Width Time
49
98.8
ns
SRAM:
tWP
>70
tWHZ
Write to Output High–Z
1,2
45 to 50
0
ns
SRAM:
tOW
>10
tOW
Write to Output Active
45 to 50
52
25
ns
SRAM:
tWHZ <50
tDOS
Data Output Setup Time
98.8
ns
SRAM:
tDW
>40
tDOH
Data Output Hold Time
0
ns
SRAM:
tDH
>0
tDIS
Data Input Setup Time
1,2,24
27 to 31
20
ns
SRAM:
tAA
< 100
tDIH
Data Input Hold Time
27 to 31
34 to 48
50 52
0
ns
SRAM:
tOH
>10
tDIL
Data Input Latch Time
50,52
198
ns
Fig. 3–18: SRAM mode waveforms
A[0...16]
tDOS
tDOH
tAA
tOH
VALID DATA
VOH
VOL
WE
VOH
VOL
VOH
VOL
DOUT
VOH
VOL
DIN
VALID DATA
VALID ADDRESS
tRC
tWP
tAS
tWR
tAW
tOW
tWHZ
tWC
tDIL
tDIS
tDIH
相關(guān)PDF資料
PDF描述
TPU3050PO TELETEXT DECODER, PDIP52
TPU3050PQ TELETEXT DECODER, PQCC44
TPU3040PK TELETEXT DECODER, PDIP40
TPU3040PO TELETEXT DECODER, PDIP52
TPU3040PQ TELETEXT DECODER, PQCC44
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