參數(shù)資料
型號: TPU3040PO
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: 圖文
英文描述: TELETEXT DECODER, PDIP52
封裝: SHRINK, PLASTIC, DIP-52
文件頁數(shù): 16/72頁
文件大小: 576K
代理商: TPU3040PO
TPU 3035, TPU 3040, TPU 3050
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
23
3.6.15.2. DRAM Slow Mode Timing at fCLK = 20.25 MHz
Symbol
Parameter
Pin No.
Min.
Typ.
Max.
Unit
Test Conditions
tPC
Page Mode Cycle Time
6
148
ns
DRAM:
tPC
> 120
tCAS
CAS Pulse Width
60
ns
DRAM:
tCAS >60
tCP
CAS Precharge Time
60
ns
DRAM:
tCP
>25
tRP
RAS Precharge Time
5
90
ns
DRAM:
tRP
>90
tRSH
RAS Hold Time
5, 6
60
ns
DRAM:
tRSH >60
tCSH
CAS Hold Time
140
ns
DRAM:
tCSH > 120
tRCD
RAS to CAS Delay Time
65
ns
DRAM:
tRCD >25
tCRP
CAS to RAS Precharge Time
85
ns
DRAM:
tCRP >10
tASR
Row Address Setup Time
5, 7 to 18
55
ns
DRAM:
tASR >0
tRAH
Row Address Hold Time
15
ns
DRAM:
tRAH >15
tAR
Column Address Hold Time
155
ns
DRAM:
tAR
>80
tRAL
Column Address Lead Time
105
ns
DRAM:
tRAL >80
tASC
Column Address Setup Time
6, 7 to 18
35
ns
DRAM:
tASC >0
tCAH
Column Address Hold Time
60
ns
DRAM:
tCAH >20
tRRH
Read Command Hold Time
4, 5
80
ns
DRAM:
tRRH >20
tRCH
Read Command Hold Time
4, 6
50
ns
DRAM:
tRCH >0
tWCH
Write Command Hold Time
90
ns
DRAM:
tWCH >30
tWCS
Write Command Setup Time
50
ns
DRAM:
tWCS >0
tDOHR
DATA Output Hold Time RAS
3, 5
155
ns
DRAM:
tDHR >90
tDOS
DATA Output Setup Time
3, 6
30
ns
DRAM:
tDS
>0
tDOH
DATA Output Hold Time
60
ns
DRAM:
tDH
>30
tDIS
DATA Input Setup Time
20
ns
DRAM:
tCAC <60
tDIH
DATA Input Hold Time
0
ns
DRAM:
tOFF <35
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