參數(shù)資料
型號: TPU3040
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: CONNECTOR ACCESSORY
中文描述: 連接器附件
文件頁數(shù): 13/73頁
文件大?。?/td> 1183K
代理商: TPU3040
TPU 3035, TPU 3040
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
13
Pin 27 and 28 –
XTAL1
and
XTAL2
(Fig. 3–11)
These oscillator pins are used to connect a 20.25MHz
crystal, which determines the internal clock signal. Alter-
natively, an 20.25MHz clock signal may be fed to pin 28.
Pin 29 –
RESET
Reset Input/Output (Fig. 3–9)
This pin is used for hardware reset. The TPU 3040
watchdog generates a reset pulse which can be used to
reset external circuits.
Pin 30 –
FBIN
Fast Blanking Input (Fig. 3–12)
This pin serves for enabling the analog RGB inputs.
Pin 31 to 33 –
RIN, GIN, BIN
RGB Inputs (Fig. 3–13)
Via these inputs, the TPU 3040 receives analog RBG
signals, e.g. OSD or video recorder (SCART), which are
fed to the analog RBG outputs. The specified level of
these signals is 0 V to 0.7 V. For other DC levels, an AC
coupling has to be used and the internal clamping circuit
will adjust the DC level.
Pin 34 –
DVSUP
Digital Supply Voltage
This pin supplies all digital stages and has to be con-
nected with the positive supply voltage.
Pin 35 –
DGND
Digital Ground
This pin is the common ground connection of all digital
stages and has to be connected with the ground of the
power supply.
Pin 36 –
FBOUT
Fast Blanking Output (Fig. 3–8)
This output supplies a fast switching signal, indicating
the presence of RBG output signals.
Pin 37 to 39 –
ROUT, GOUT, BOUT
RGB Outputs
(Fig. 3–13)
These outputs either supply the analog RGB signals,
which have been received via the analog RGB input pins
31 to 33, or the internally generated RGB signals.
Pin 40 –
AGND
Analog Ground
This pin is the common ground connection of all analog
stages and has to be connected with the ground of the
power supply.
Pin 41 –
AVSUP
Analog Supply Voltage
This pin supplies all analog stages and has to be con-
nected with the positive supply voltage.
Pin 42 and 44 –
VIN1
and
VIN2
Analog Video Inputs
(Fig. 3–14)
The analog input signals carrying text data are fed to the
TPU 3040 via a clamping capacitor of 33nF to these
pins.
Pin 43 –
SGND
Signal Ground
The lower end of the internal reference chain of the A/D
converter is internally connected to the pin 43.
3.4. Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
GOUT / COLOR1
BOUT / COLOR2
FBOUT / COLOR3
DGND
DVSUP
WE
RAS
CAS
A0
A1
A2
A3
A5
A6
A7
RIN / COLOR4
IR
BIN / PRIO1
A4
VRT
SGND
VIN1
AVSUP
GIN / PRIO2
RESET
FBIN / PRIO0
XTAL1 / CLK20
XTAL2
A8
SCL
A9
A10
VSYNC / CSYNC
DATA
A11
SDA
TEST
HSYNC / MSYNC
AGND
ROUT / COLOR0
T
Fig. 3–3:
TPU 3040 in 40-pin PDIP package
TPU 3040
7
8
9
10
11
12
13
14
15
16
17
29
30
31
32
33
34
35
36
37
38
39
18 19 20 21 22 23 24
25 26 27 28
6
5
4
3
2
1 44 43 42 41 40
FBIN / PRIO0
BIN / PRIO1
GIN / PRIO2
RIN / COLOR4
DVSUP
FBOUT / COLOR3
DGND
BOUT / COLOR2
GOUT / COLOR1
ROUT / COLOR0
AGND
AVSUP
VIN1
SGND
RESET
XTAL2
VSYNC / CSYNC
HSYNC / MSYNC
SDA
SCL
A9
A8
A6
A2
A1
RAS
A7
DATA
TEST
A10
XTAL1 / CLK20
MAC_PAK
CAS
A0
A5
A3
A4
A11
MAC_SYNC
IR
WE
VIN2
VRT
MAC_VBI
Fig. 3–4:
TPU 3040 in 44-pin PLCC package
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