- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383964 > TPU3035 (MICRONAS SEMICONDUCTOR HOLDING AG) CONNECTOR ACCESSORY PDF資料下載
參數(shù)資料
| 型號： | TPU3035 |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 連接器附件 |
| 文件頁數(shù)： | 6/73頁 |
| 文件大?。?/td> | 1183K |
| 代理商： | TPU3035 |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁
PRELIMINARY DATA SHEET
TPU 3035, TPU 3040
MICRONAS INTERMETALL
6
2. Functional Description
2.1. Conceptional Overview
The basic idea behind the TPU 3040 concept is the re-
placement of random logic by software. The still existing
hardware supports the on-chip CPU in tasks with high
data rates and ineffective software solutions. Typical
tasks of a teletext decoder are listed below (realization
on TPU 3040 in brackets):
– teletext data acquisition
(hardware)
– teletext data decoding
(software)
– page generation
(software)
– page memory management
(software)
– page display
(hardware)
– user interface
(software)
Fig. 2–1 shows the functional block diagram of the
TPU 3040. The software approach is realized using a
65C02 core with RAM and program ROM on chip. Via
I/O the CPU is connected to a DRAM interface. The
DRAM contains an acquisition scratch buffer which is
filled automatically by the teletext slicer circuit. After pro-
cessing this scratch buffer, the CPU stores reorganized
teletext lines into the page memory which takes up the
greatest space in the DRAM capacity. A third part of the
DRAM holds WST level 2 display data, which are read
out by the WST layer. The CPU has to generate the dis-
play data by decoding teletext information from the page
memory.
Apart from the WST layer, there is also one additional
on-chip OSD layer. The OSD layer accesses the on-chip
memory to read text and character font information. The
RGB outputs of the OSD layer can have higher priority
than the WST layer outputs. Thus it is possible to overlay
the teletext display with an additional layer for user guid-
ance.
The CPU memory contains RAM, program ROM and
character ROM. The character ROM holds the font data
and is separated from the program ROM to save CPU
time. The CPU can still access the character ROM via
a DMA interface including wait cycles. The WST layer
and the additional OSD layer can also access the CPU
memory via the same DMA interface.
The CPU is supported by some glue logic such as timer,
watchdog and interrupt controller and communicates
with the outside world via the I
2
C-Bus.
相關PDF資料 |
PDF描述 |
|---|---|
| TPU3040 | CONNECTOR ACCESSORY |
| TPU3041 | CONNECTOR ACCESSORY |
| TRF1121_07 | Dual VCO/PLL Synthesizer With IF Up-Converter |
| TRF1122_07 | 2.5-GHz Integrated Up-Converter |
| TRM7043 | OC-192 SR-2 Transmitter Module(OC-192 SR-2 發(fā)送器模塊) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TPU3035(DIP40) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Consumer IC |
| TPU3035(PDIP40) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| TPU3035(PLCC44) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| TPU3035(PSDIP52) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| TPU304 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | JFET | P-CHANNEL | 30MA I(DSS) | TO-226AA |
發(fā)布緊急采購，3分鐘左右您將得到回復。