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參數(shù)資料
| 型號： | TPS9103Y |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | POWER SUPPLY FOR GaAs POWER AMPLIFIERS |
| 中文描述： | 電源供應(yīng)器的GaAs功率放大器 |
| 文件頁數(shù)： | 1/22頁 |
| 文件大?。?/td> | 341K |
| 代理商： | TPS9103Y |
TPS9103
POWER SUPPLY FOR GaAs POWER AMPLIFIERS
SLVS131A – OCTOBER 1995 – REVISED JULY 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Charge Pump Provides Negative Gate Bias
for Depletion-Mode GaAs Power Amplifiers
Buffered Clock Output to Drive Additional
External Charge Pump
135-m
High-Side Switch Controls Supply
Voltage to the GaAs Power Amplifier
Power-Good Circuitry Prevents High-Side
Switch Turn-on Until Negative Gate Bias is
Present
Charge Pump Can Be Driven From the
Internal Oscillator or An External Clock
10-
μ
A Maximum Standby Current
Low-Profile (1.2-mm Max Height), 20-Pin
TSSOP Package
description
The TPS9103 is a highly integrated power supply for depletion-mode GaAs power amplifiers (PA) in cellular
handsets and other wireless communications equipment. Functional integration and low-profile packaging
combine to minimize circuit-board area and component height requirements. The device includes: a p-channel
MOSFET configured as a high-side switch to control the application of power to the PA; a driver for the high-side
switch with a logic-compatible input; a charge pump to provide negative gate-bias voltage; and logic to prevent
turn-on of the high-side switch until gate bias is present. The high-side switch has a typical on-state resistance
of 135 m
.
The TPS9103 is available in a 20-pin thin shrink small-outline package (TSSOP) or in chip form. Contact factory
for die sales. The device operates over a junction temperature range of –25
°
C to 125
°
C.
AVAILABLE OPTIONS
PACKAGED DEVICE
TSS0P
(PW)
CHIP FORM
(Y)
TA
–25
°
C to 85
°
C
The PW package is only available left-end taped and reeled
(indicated by the LE suffix on the device type).
TPS9103PWLE
TPS9103Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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2
3
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7
8
9
10
20
19
18
17
16
15
14
13
12
11
GATE_BIAS
V
CC
C1–
C1+
BATT_IN
BATT_IN
BATT_IN
PGP
PG
GND
V
DD
CLK
BCLK
GND
BATT_OUT
BATT_OUT
BATT_OUT
SW_EN
OSC_EN
EN
PW PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1996, Texas Instruments Incorporated
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