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參數(shù)資料
| 型號： | TPS73612DCQ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Cap-Free, NMOS, 400mA Low-Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，400mA的低壓差穩(wěn)壓器的反向電流保護(hù) |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 710K |
| 代理商： | TPS73612DCQ |
www.ti.com
V
N
( V
RMS
)
8.5
V
RMS
V
V
OUT
(V)
(3)
Transient Response
The low open-loop output impedance provided by the
NMOS
pass
element
configuration allows operation without an output
capacitor
for
many
applications.
regulator, the addition of a capacitor (nominal value
1
μ
F) from the output pin to ground will reduce
undershoot magnitude but increase its duration. In
the adjustable version, the addition of a capacitor,
C
FB
, from the output to the adjust pin will also
improve the transient response.
Board Layout Recommendation to Improve
PSRR and Noise Performance
To improve ac performance such as PSRR, output
noise, and transient response, it is recommended
that the board be designed with separate ground
planes for V
IN
and V
OUT
, with each ground plane
connected only at the GND pin of the device. In
addition, the ground connection for the bypass
capacitor should connect directly to the GND pin of
the device.
Internal Current Limit
The TPS736xx internal current limit helps protect the
regulator during fault conditions. Foldback helps to
protect the regulator from damage during output
short-circuit conditions by reducing current limit when
V
OUT
drops below 0.5V. See
Figure 11
in the
Typical
Characteristics
section for a graph of I
OUT
vs V
OUT
.
Shutdown
The Enable pin is active high and is compatible with
standard TTL-CMOS levels. V
EN
below 0.5V (max)
turns the regulator off and drops the ground pin
current to approximately 10nA. When shutdown
capability is not required, the Enable pin can be
connected to V
IN
. When a pull-up resistor is used,
and operation down to 1.8V is required, use pull-up
resistor values below 50k
.
(Fixed Voltage Version)
dV dt
V
OUT
80k
C
OUT
R
LOAD
(4)
(Adjustable Voltage Version)
dV dt
V
OUT
(R
1
C
OUT
80k
R
2
) R
LOAD
(5)
Dropout Voltage
The TPS736xx uses an NMOS pass transistor to
achieve extremely low dropout. When (V
IN
– V
OUT
) is
less than the dropout voltage (V
DO
), the NMOS pass
device is in its linear region of operation and the
input-to-output resistance is the R
DS-ON
of the NMOS
pass element.
TPS736xx
SBVS038N–SEPTEMBER 2003–REVISED JANUARY 2007
For
TPS736xx requires a larger voltage drop from V
to
V
OUT
to avoid degraded transient response. The
boundary
of
this
transient
approximately twice the dc dropout. Values of
V
IN
– V
OUT
above this line insure normal transient
response.
large
step
changes
in
load
current,
the
dropout
region
is
for C
NR
= 10nF.
This noise reduction effect is shown as RMS Noise
Voltage vs C
NR
in the
Typical Characteristics
section.
The TPS73601 adjustable version does not have the
noise-reduction pin available. However, connecting a
feedback capacitor, C
FB
, from the output to the FB
pin will reduce output noise and improve load
transient performance.
Operating in the transient dropout region can cause
an increase in recovery time. The time required to
recover from a load transient is a function of the
magnitude of the change in load current rate, the
rate of change in load current, and the available
headroom
(V
IN
to
V
OUT
worst-case conditions [full-scale instantaneous load
change with (V
IN
– V
OUT
) close to dc dropout levels],
the TPS736xx can take a couple of hundred
microseconds to return to the specified regulation
accuracy.
voltage
drop).
Under
The TPS736xx uses an internal charge pump to
develop an internal supply voltage sufficient to drive
the gate of the NMOS pass element above V
OUT
.
The charge pump generates ~250
μ
V of switching
noise
at
~4MHz;
however,
contribution is negligible at the output of the regulator
for most values of I
OUT
and C
OUT
.
charge-pump
noise
in
a
voltage
follower
As
with
any
The TPS736xx does not have active pull-down when
the output is over-voltage. This allows applications
that
connect
higher
voltage
alternate power supplies, to the output. This also
results in an output overshoot of several percent if
load current quickly drops to zero when a capacitor
is connected to the output. The duration of overshoot
can be reduced by adding a load resistor. The
overshoot decays at a rate determined by output
capacitor
C
OUT
and
the
resistance. The rate of decay is given by:
sources,
such
as
internal/external
load
12
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| TPS73615DBVR | 功能描述:低壓差穩(wěn)壓器 - LDO Cap-Free NMOS 400mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73615DBVRG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Cap-Free NMOS 400mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73615DBVT | 功能描述:低壓差穩(wěn)壓器 - LDO Cap-Free NMOS 400mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73615DBVTG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Cap-Free NMOS 400mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73615DCQ | 功能描述:低壓差穩(wěn)壓器 - LDO Cap-Free NMOS 400mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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