參數資料
型號： TPS7348y
廠商： Texas Instruments, Inc.
元件分類： 基準電壓源/電流源
英文描述： Low-Dropout Voltage Regulators(帶RESET功能，低壓差PMOS穩(wěn)壓器)
中文描述： 低壓差穩(wěn)壓器（帶復位功能，PMOS的低壓差穩(wěn)壓器）
文件頁數： 7/37頁
文件大小： 839K
代理商： TPS7348Y
TPS7301Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124D – JUNE 1995 – REVISED JANUARY 1997
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TPS7301Q electrical characteristics at I
O
= 10 mA, V
I
= 3.5 V, EN = 0 V, C
O
= 4.7
μ
F(CSR
= 1
), FB
shorted to OUT at device leads (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TJ
25
°
C
MIN
TYP
MAX
UNIT
V
Reference voltage
(measured at FB)
VI = 3.5 V,
2.5 V
≤
VI
≤
10 V,
See Note 1
IO = 10 mA
5 mA
≤
IO
≤
500 mA,
1.182
–40
°
C to 125
°
C
1.147
1.217
V
Reference voltage temperature
coefficient
–40
°
C to 125
°
C
61
75
ppm/
°
C
VI= 2 4 V
VI = 2.4 V,
μ
≤
50
A
IO
≤
150 mA
25
°
C
0.7
1
–40
°
C to 125
°
C
25
°
C
–40
°
C to 125
°
C
25
°
C
–40
°
C to 125
°
C
25
°
C
25
°
C
25
°
C
–40
°
C to 125
°
C
25
°
C
–40
°
C to 125
°
C
25
°
C
–40
°
C to 125
°
C
25
°
C
–40
°
C to 125
°
C
25
°
C
–40
°
C to 125
°
C
25
°
C
25
°
C
25
°
C
25
°
C
–40
°
C to 125
°
C
1
VI= 2 4 V
VI = 2.4 V,
≤
150 mA
IO
≤
500 mA
0.83
1.3
Pass-element series resistance (see
Pass element series resistance (see
Note 2)
1.3
VI= 2 9 V
VI = 2.9 V,
μ
≤
50
A
IO
≤
500 mA
0.52
0.85
0.85
VI = 3.9 V,
VI = 5.9 V,
VI = 2.5 V to 10 V,
VI 2.5 V to 10 V,
See Note 1
50
μ
A
≤
IO
≤
500 mA
50
μ
A
≤
IO
≤
500 mA
50
μ
A
≤
IO
≤
500 mA,
0.32
0.23
Input regulation
3
18
mV
25
Output regulation
l i
2.5 V
≤
VI
≤
10 V,
See Note 1
O = 5 mA to 500 mA,
O 5 mA to 500 mA,
5
14
mV
25
2.5 V
≤
VI
≤
10 V,
See Note 1
IO = 50
IO 50
μ
A to 500 mA,
7
22
mV
54
Ripple rejection
f = 120 Hz
IO= 50
μ
IO = 50
A
48
59
dB
44
IO = 500 mA,
IO 500 mA,
See Note 1
45
54
44
Output noise-spectral density
f = 120 Hz
2
μ
V/
√
Hz
Output noise voltage
≤
≤
10 Hz
f
100 kHz,
CSR= 1
CSR = 1
CO = 4.7
μ
F
CO = 10
μ
F
CO = 100
μ
F
95
89
Vrms
μ
74
RESET trip-threshold voltage§
VO(FB) decreasing
1.101
1.145
V
RESET hysteresis voltage§
Measured at VO(FB)
25
°
C
12
mV
RESET output low voltage§
VI= 2 13 V
VI = 2.13 V,
IO(RESET)= 400
μ
IO(RESET) = 400
A
25
°
C
0.1
0.4
V
–40
°
C to 125
°
C
25
°
C
–40
°
C to 125
°
C
0.4
FB input current
–10
–20
0.1
10
20
nA
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
§Output voltage programmed to 2.5 V with closed-loop configuration (see application information).
NOTES:
1. When VI < 2.9 V and IO > 150 mA simultaneously, pass element rDS(on) increases (see Figure 32) to a point where the resulting
dropout voltage prevents the regulator from maintaining the specified tolerance range.
2. To calculate dropout voltage, use equation: VDO = IO
rDS(on)
rDS(on) is a function of both output current and input voltage. The parametric table lists rDS(on) for VI = 2.4 V, 2.9 V, 3.9 V, and
5.9 V, which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V, 4 V, and 6 V respectively. For other
programmed values, refer to Figure 32.
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