參數(shù)資料
型號(hào): TPS62421DRCR
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 1.61 A DUAL SWITCHING CONTROLLER, 2500 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, GREEN, PLASTIC, SON-10
文件頁(yè)數(shù): 9/37頁(yè)
文件大?。?/td> 1020K
代理商: TPS62421DRCR
www.ti.com
SLVS676C – JUNE 2006 – REVISED JUNE 2010
Under-Voltage Lockout
The under voltage lockout circuit prevents the device from malfunctioning at low input voltages and from
excessive discharge of the battery and disables the converters. The under-voltage lockout threshold is typically
1.5V, max 2.35V. In case the default register values are overwritten by the Interface, the new values in the
registers REG_DEF_1_Low and REG_DEF_2 remain valid as long the supply voltage does not fall under the
under-voltage lockout threshold, independent of whether the converters are disabled.
MODE SELECTION
The MODE/DATA pin allows mode selection between forced PWM Mode and Power Save Mode for both
converters. Furthermore, this pin is a multipurpose pin and provides (besides Mode selection) a one-pin interface
to receive serial data from a host to set the output voltage. This is described in the section EasyScale Interface.
Connecting this pin to GND enables the automatic PWM and power save mode operation. The converters
operate in fixed-frequency PWM mode at moderate to heavy loads and in the PFM mode during light loads,
maintaining high efficiency over a wide load current range.
Pulling the MODE/DATA pin high forces both converters to operate constantly in the PWM mode even at light
load currents. The advantage is the converters operate with a fixed frequency that allows simple filtering of the
switching frequency for noise sensitive applications. In this mode, the efficiency is lower compared to the power
save mode during light loads. For additional flexibility it is possible to switch from Power Save Mode to forced
PWM mode during operation. This allows efficient power management by adjusting the operation of the converter
to the specific system requirements.
In case the operation mode will be changed from forced PWM mode (MODE/DATA = high) to Power Save Mode
Enable (MODE/DATA = 0) the Power Save Mode will be enabled after a delay time of typically ttimeout, which is a
maximum of 520ms.
The forced PWM Mode operation is enabled immediately with Pin MODE/DATA set to 1.
ENABLE
The device has for each converter a separate EN pin to start up each converter independently. If EN1, EN2 are
set to high, the corresponding converter starts up with soft start as previously described.
Pulling EN1 and EN2 pin low forces the device into shutdown, with a shutdown quiescent current of typically
1.2mA. In this mode, the P and N-Channel MOSFETs are turned-off and the entire internal control circuitry is
switched-off. For proper operation the EN1 and EN2 pins must be terminated and must not be left floating.
DEF_1 PIN FUNCTION
The DEF_1 pin is dedicated to converter 1 and makes the output voltage selection very flexible to support
dynamic voltage management. Depending on the device version, this pin works either as:
1. Analog input for adjustable output voltage setting (TPS62420): Connecting an external resistor network to this
pin adjusts the default output voltage to any value starting from 0.6V to VIN.
2. Digital input for fixed default output voltage selection (TPS62421): In case this pin is tied to low level, the
output voltage is set according to the value in register REG_DEF_1_Low. The default voltage will be 1.2V. If tied
to high level, the output voltage is set according to the value in register REG_DEF_1_High. The default value in
this case is 1.8V. Depending on the level of Pin DEF_1, it selects between the two registers REG_DEF_1_Low
and REG_DEF_1_High for output voltage setting. Each register content (and therefore output voltage) can be
changed individually via the EasyScale interface. This makes the device very flexible in terms of output voltage
setting; see Table 4.
180° OUT OF PHASE OPERATION
In PWM Mode the converters operate with a 180° turn-on phase shift of the PMOS (high side) transistors. It
prevents the high side switches of both converters to be turned on simultaneously, and therefore smooths the
input current. This feature reduces the surge current drawn from the supply.
Copyright 2006–2010, Texas Instruments Incorporated
17
Product Folder Link(s): TPS62420 TPS62421
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