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參數(shù)資料
| 型號(hào)： | TPS535G20 |
| 英文描述： | PHOTOVOLTAIC CELL FOR THERMOPILE DETECTION |
| 中文描述： | 光伏電池的熱電堆檢測(cè) |
| 文件頁數(shù)： | 12/16頁 |
| 文件大小： | 231K |
| 代理商： | TPS535G20 |
TPS5300
IMVP MOBILE POWER SUPPLY CONTROLLER
SLVS334 – DECEMBER 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
active voltage DROOP positioning
The droop compensation network reduces the load transient overshoot/undershoot on V
O
, relative to V
ref
.
V
O(max)
is programmed to a voltage greater than V
ref
in the mechanical data drawing by an external resistor
divider from V
O
to the VSENSE pin to reduce the undershoot on V
OUT
during a low to high load transient. The
overshoot during a high to low load transient is reduced by subtracting the voltage that is on the DROOP pin
from V
ref
. The voltage on the IOUT pin is divided down with an external resistor divider, and connected to the
DROOP pin. Thus, under loaded conditions, V
O
is regulated to V
O(max)
– V
(DROOP)
. The continuous sensing
of the inductor current allows a fast regulating voltage adjustment allowing higher transient repetition rates.
low-side driver
The low-side driver is designed to drive low r
ds(on)
, N-channel MOSFETs. The current of the driver is typically
2
-
A source and 3.3-A sink. The supply to the low-side driver is internally connected to V
CC
.
high-side driver
The high-side driver is designed to drive low r
ds(on)
N-channel MOSFETs. The current of the driver is typically
2-A source and 3.3-A sink. The high-side driver is configured as a floating bootstrap driver. The internal
bootstrap diode, connected between the DRV and BOOT pins, is a Schottky diode for improved drive efficiency.
The maximum voltage that can be applied between the BOOT pin and ground is 35 V.
deadtime control
The deadtime control prevents shoot-through current from flowing through the main power FET’s during the
switching transitions by actively controlling the turnon times of the MOSFET drivers. The high-side driver is not
allowed to turn on until the gate drive voltage to the low-side FET is below 1.7 V. The low-side driver is not
allowed to turn on until the gate drive voltage from high-side FET to PH is below 1.3 V.
current sensing
Current sensing is achieved by sensing the voltage across a current-sense resistor placed in series between
the output inductor and the output capacitors. The sensing network consists of a high bandwidth differential
amplifier with a gain of 25x to allow using sense resistors with values as low as 1 m
. Sensing occurs at all times
to allow having realtimeinformation for quick response during an active voltage droop positioning transition. The
voltage on the IOUT pin equals 25 times the sensed voltage.
VR_ON
The VR_ON terminal is a TTL compatible digital pin that is used to enable the controller. When VR_ON is low,
the output drivers are low, the linear regulator drivers are off, and the slowstart capacitor is discharged. When
VR_ON goes high, the short across the slowstart capacitor is released and normal converter operation begins.
When the system logic supply is connected to the VR_ON pin, the VR_ON pin can control power sequencing
by locking out controller operation until the system logic supply exceeds the input threshold voltage of the
VR_ON circuit. Thus, V
CC
and the system logic supply (either 5 V or 3.3 V) must be above UVLO thresholds
before the controller is allowed to start up. Likewise, a microprocessor or other external logic can also control
the sequencing through VR_ON.
V
BIAS
undervoltage lockout
The VBIAS undervoltage-lockout circuit disables the controller, while VBIAS is below the 4.46-V start threshold
during power up. The controller is disabled when VBIAS goes below 3.3 V. While the controller is disabled, the
output drivers will be low and the slowstart capacitor will be shorted. When VBIAS exceeds the start threshold,
the short across the slowstart capacitor is released and normal converter operation begins.
P
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