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參數(shù)資料
| 型號： | TPA3101D2_07 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 10-W STEREO CLASS-D AUDIO POWER AMPLIFIER |
| 中文描述： | 10 W立體聲D類音頻功率放大器 |
| 文件頁數(shù)： | 23/38頁 |
| 文件大小： | 3230K |
| 代理商： | TPA3101D2_07 |
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BSN and BSP Capacitors
VCLAMP Capacitors
Internal Regulated 4-V Supply (VREG)
VBYP Capacitor Selection
ROSC Resistor Selection
F
=
OSC
1
2xROSCxCOSC
(4)
TPA3101D2
SLOS473A–DECEMBER 2005–REVISED FEBRUARY 2006
The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the
high side of each output to turn on correctly. A 220-nF ceramic capacitor, rated for at least 25 V, must be
connected from each output to its corresponding bootstrap input. Specifically, one 220-nF capacitor must be
connected from xOUTP to BSxx, and one 220-nF capacitor must be connected from xOUTN to BSxx. (See the
application circuit diagram in
Figure 21
.)
The bootstrap capacitors connected between the BSxx pins and corresponding output function as a floating
power supply for the high-side N-channel power MOSFET gate drive circuitry. During each high-side switching
cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side MOSFETs
turned on.
To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, two
internal regulators clamp the gate voltage. Two 1-
μ
F capacitors must be connected from VCLAMPL (pin 30) and
VCLAMPR (pin 31) to ground and must be rated for at least 16 V. The voltages at the VCLAMP terminals may
vary with V
CC
and may not be used for powering any other circuitry.
The VREG terminal (pin 15) is the output of an internally generated 4-V supply, used for the oscillator,
preamplifier, and gain control circuitry. It requires a 10-nF capacitor, placed close to the pin, to keep the regulator
stable.
This regulated voltage can be used to control GAIN0, GAIN1, MSTR/SLV, and MUTE terminals, but should not
be used to drive external circuitry.
The internal bias generator (VBYP) nominally provides a 1.25-V internal bias for the preamplifier stages. The
external input capacitors and this internal reference allow the inputs to be biased within the optimal
common-mode range of the input preamplifiers.
The selection of the capacitor value on the VBYP terminal is critical for achieving the best device performance.
During power up or recovery from the shutdown state, the VBYP capacitor determines the rate at which the
amplifier starts up. When the voltage on the VBYP capacitor equals VBYP, the device starts a 16.4-ms timer.
When this timer completes, the outputs start switching. The charge rate of the capacitor is calculated using the
standard charging formula for a capacitor, I = C x dV/dT. The charge current is nominally equal to 250μA and dV
is equal to VBYP. For example, a 1-μF capacitor on VBYP would take 5 ms to reach the value of VBYP and
begin a 16.4-ms count before the outputs turn on. This equates to a turn-on time of <30 ms for a 1-μF capacitor
on the VBYP terminal.
A secondary function of the VBYP capacitor is to filter high-frequency noise on the internal 1.25-V bias generator.
A value of at least 0.47μF is recommended for the VBYP capacitor. For the best power-up and shutdown pop
performance, the VBYP capacitor should be greater than or equal to the input capacitors.
The resistor connected to the ROSC terminal controls the class-D output switching frequency using
Equation 4
:
COSC is an internal capacitor that is nominally equal to 20 pF. Variation over process and temperature can
result in a
±
15% change in this capacitor value.
For example, if ROSC is fixed at 100 k
, the frequency from device to device with this fixed resistance could
vary from 217 kHz to 294 kHz with a 15% variation in the internal COSC capacitor. The tolerance of the ROSC
resistor should also be considered to determine the range of expected switching frequencies from device to
device. It is recommended that 1% tolerance resistors be used.
23
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