- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384025 > TPA28F400BV-B60 (Intel Corp.) 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY PDF資料下載
參數(shù)資料
| 型號： | TPA28F400BV-B60 |
| 廠商： | Intel Corp. |
| 英文描述： | 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| 中文描述： | 2兆位SmartVoltage啟動塊閃存系列 |
| 文件頁數(shù)： | 39/55頁 |
| 文件大?。?/td> | 638K |
| 代理商： | TPA28F400BV-B60 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當前第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
E
NOTES:
1. Read timing characteristics during program and erase operations are the same as during read-only operations. Refer to AC
Characteristicsduring read mode.
2. The on-chip WSM completely automates program/erase operations; program/erase algorithms are now controlled internally
which includes verify and margining operations.
3. Refer to command definition table for valid A
IN
. (Table 7)
4. Refer to command definition table for valid D
IN
. (Table 7)
5. Program/erase durations are measured to valid SRD data (successful operation, SR.7 = 1).
6. For boot block program/erase, RP# should be held at V
HH
or WP# should be held at V
IH
until operation completes
successfully.
7. Time t
PHBR
is required for successful locking of the boot block.
8. Sampled, but not 100% tested.
9. See Test Configuration(Figure 14), 3.3 V Standard Test component values.
10. See Test Configuration(Figure 14), 5 V High-Speed Test component values.
11. See Test Configuration(Figure 14), 5 V Standard Test component values.
2-MBIT SmartVoltage BOOT BLOCK FAMILY
39
SEE NEW DESIGN RECOMMENDATIONS
ADDRESSES (A)
CE# (E)
OE# (G)
WE# (W)
DATA (D/Q)
RP# (P)
IH
V
IL
V
V
IH
IL
V
V
IH
IL
V
IH
V
IL
V
HH
V
V
6.5V
IL
V
IL
V
IN
D
IN
A
IN
A
WHEH
t
WHWL
t
Valid
SRD
IN
D
WHQV1,2,3,4
t
PHHWH
t
IH
PHWL
t
High Z
WHDX
t
IH
V
IL
V
V (V)
1
2
3
4
6
5
PPH
V
V
PPLK
V
PPH
1
2
WP#
IL
V
IH
V
AVAV
t
AVWH
t
WHAX
t
DVWH
t
WLWH
t
QVPH
t
QVVL
t
VPWH
t
IN
D
ELWL
t
NOTES:
1. V
CC
Power-Up and Standby.
2. Write program or Erase Set-Up Command.
3. Write Valid Address and Data (Program) or Erase Confirm Command.
4. Automated Program or Erase Delay.
5. Read Status Register Data.
6. Write Read Array Command.
0530_17
Figure 17. AC Waveforms for Write Operations (WE#
–Controlled Writes)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TPA28F200CV-B60 | 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TPA28F400CV-B60 | 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TPA28F200BV-B80 | 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TPA28F400BV-B80 | POWERLINE: RP30-S_DE - 2:1 Wide Input Voltage Range- 30 Watts Output Power- 1.6kVDC Isolation- Fixed Operating Frequency- Six-Sided Continuous Shield- International Safety Standard Approvals- Ul 1950 Component Recognised- Standard 50.8 x40.6x10.2mm Package- Efficiency to 90% |
| TPA28F800BV-B80 | RP30 (E) Series - Powerline Regulated DC-DC Converters; Input Voltage (Vdc): 48V; Output Voltage (Vdc): 3.3V; 2:1 Wide Input Voltage Range; 30 Watts Output Power; 1.6kVDC Isolation; UL Certified; Fixed Operating Frequency; Six-Sided Continuous Shield; International Safety Standard Approvals; Standard 50.8 x40.6x10.2mm Package; Efficiency to 90% |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPA28F400BV-B80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TPA28F400BV-T60 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TPA28F400BV-T80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TPA28F400BX-B90 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM |
| TPA28F400BX-T90 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。