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Rev. 1.0
51
C8051F70x/71x
Table 9.8. Capacitive Sense Electrical Characteristics
VDD = 1.8 to 3.6 V; TA = –40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
Single Conversion Time1
12-bit Mode
13-bit Mode (default)
14-bit Mode
16-bit Mode
20
21
23
26
29
31
33
38
40
42.5
45
50
s
Number of Channels
64-pin Packages
48-pin Packages
32-pin Packages
24-pin Packages
38
27
26
18
Channels
Capacitance per Code
Default Configuration
—
1
—
fF
External Capacitive Load
CS0CG = 111b (Default)
CS0CG = 000b
—
45
500
pF
External Series Impedance
CS0CG = 111b (Default)
—
50
k
Quantization Noise12
RMS
Peak-to-Peak
—
3
20
—
fF
Power Supply Current
CS module bias current, 25 °C
—
50
60
A
CS module alone, maximum code
output, 25 °C
—
90
105
A
Wake-on-CS threshold (suspend mode
with regulator and CS module on)3
—
130
145
A
Notes:
1. Conversion time is specified with the default configuration.
2. RMS Noise is equivalent to one standard deviation. Peak-to-peak noise encompasses ±3.3 standard
deviations. The RMS noise value is specified with the default configuration.
3. Includes only current from regulator, CS module, and MCU in suspend mode.