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Mixed Signal ISP Flash MCU Family
C8051F70x/71x
Rev. 1.0 7/10
Copyright 2010 by Silicon Laboratories
C8051F70x/71x
Capacitance to Digital Converter
-
Supports buttons, sliders, wheels, capacitive prox-
imity, and touch screen sensing
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Up to 38 input channels
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Fast 40 s per channel conversion time
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12, 13, 14, or 16-bit output
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Auto-scan and wake-on-touch
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Auto-accumulate 4, 8, 16, 32, or 64 samples
10-Bit Analog to Digital Converter
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Up to 500 ksps
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Up to 16 external single-ended inputs
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VREF from on-chip VREF, external pin or VDD
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Internal or external start of conversion source
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Built-in temperature sensor
Analog Comparator
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Programmable hysteresis and response time
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Configurable as interrupt or reset source
On-Chip Debug
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On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
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Provides breakpoints, single stepping,
inspect/modify memory and registers
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Superior performance to emulation systems using
ICE-chips, target pods, and sockets
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Low cost, complete development kit
Supply Voltage 1.8 to 3.6 V
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Built-in voltage supply monitor
High-Speed 8051 C Core
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Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
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Up to 25 MIPS throughput with 25 MHz clock
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Expanded interrupt handler
Memory
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512 bytes internal data RAM (256 + 256)
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Up to 16 kB Flash; In-system programmable in 512-
byte Sectors
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Up to 32-byte data EEPROM
Digital Peripherals
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Up to 54 Port I/O with high sink current
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Hardware enhanced UART, SMBus (I2C compati-
ble), and enhanced SPI serial ports
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Four general purpose 16-bit counter/timers
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16-Bit programmable counter array (PCA) with 3
capture/compare modules and enhanced PWM
functionality
-
Real time clock mode using timer and crystal
Clock Sources
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24.5 MHz ±2% Oscillator Supports crystal-less
UART operation
-
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
-
Can switch between clock sources on-the-fly; useful
in power saving modes
64-Pin TQFP, 48-Pin TQFP, 48-Pin QFN,
32-Pin QFN, 24-Pin QFN
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
16 kB
ISP FLASH
512 B RAM
POR
DEBUG
CIRCUITRY
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DIGITAL I/O
24.5 MHz PRECISION INTERNAL OSCILLATOR
HIGH-SPEED CONTROLLER CORE
CROSSBAR
VOLTAGE
COMPARATOR
+
–
WDT
UART
SMBus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
SPI
10-bit
500 ksps
ADC
TEMP
SENSOR
A
M
U
X
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6.0
– 6.5
32 B EEPROM
E
x
t.
Memory
I/F
Capacitive
Sense