參數(shù)資料
型號: TOOLSTICK330PP
廠商: Silicon Laboratories Inc
文件頁數(shù): 54/226頁
文件大?。?/td> 0K
描述: ADAPTER PROGRAM TOOLSTICK F330
標(biāo)準(zhǔn)包裝: 1
系列: ToolStick
類型: 微控制器編程器
適用于相關(guān)產(chǎn)品: C8051F330/331/332/333/334/335/336/337
所含物品: 2 個板和 USB 連接線纜
相關(guān)產(chǎn)品: 336-1429-5-ND - IC MCU 16K FLASH 20QFN
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C8051F333-GMR-ND - IC 8051 MCU 4K FLASH 20MLP
C8051F332-GMR-ND - IC 8051 MCU 4K FLASH 20MLP
C8051F331-GMR-ND - IC 8051 MCU 8K FLASH 20QFN
C8051F330-GMR-ND - IC 8051 MCU 8K FLASH 20MLP
336-1269-ND - IC 8051 MCU 2KB FLASH 20QFN
336-1268-ND - IC 8051 MCU 2KB FLASH 20QFN
更多...
其它名稱: 336-1451
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Rev.1.0
147
C8051F336/7/8/9
21.4.3. Hardware Slave Address Recognition
The SMBus hardware has the capability to automatically recognize incoming slave addresses and send an
ACK without software intervention. Automatic slave address recognition is enabled by setting the EHACK
bit in register SMB0ADM to 1. This will enable both automatic slave address recognition and automatic
hardware ACK generation for received bytes (as a master or slave). More detail on automatic hardware
ACK generation can be found in Section 21.4.2.2.
The registers used to define which address(es) are recognized by the hardware are the SMBus Slave
Address register (SFR Definition 21.3) and the SMBus Slave Address Mask register (SFR Definition 21.4).
A single address or range of addresses (including the General Call Address 0x00) can be specified using
these two registers. The most-significant seven bits of the two registers are used to define which
addresses will be ACKed. A 1 in bit positions of the slave address mask SLVM[6:0] enable a comparison
between the received slave address and the hardware’s slave address SLV[6:0] for those bits. A 0 in a bit
Table 21.3. Sources for Hardware Changes to SMB0CN
Bit
Set by Hardware When:
Cleared by Hardware When:
MASTER
A START is generated.
A STOP is generated.
Arbitration is lost.
TXMODE
START is generated.
SMB0DAT is written before the start of an
SMBus frame.
A START is detected.
Arbitration is lost.
SMB0DAT is not written before the
start of an SMBus frame.
STA
A START followed by an address byte is
received.
Must be cleared by software.
STO
A STOP is detected while addressed as a
slave.
Arbitration is lost due to a detected STOP.
A pending STOP is generated.
ACKRQ
A byte has been received and an ACK
response value is needed (only when
hardware ACK is not enabled).
After each ACK cycle.
ARBLOST
A repeated START is detected as a
MASTER when STA is low (unwanted
repeated START).
SCL is sensed low while attempting to
generate a STOP or repeated START
condition.
SDA is sensed low while transmitting a 1
(excluding ACK bits).
Each time SI is cleared.
ACK
The incoming ACK value is low
(ACKNOWLEDGE).
The incoming ACK value is high
(NOT ACKNOWLEDGE).
SI
A START has been generated.
Lost arbitration.
A byte has been transmitted and an
ACK/NACK received.
A byte has been received.
A START or repeated START followed by a
slave address + R/W has been received.
A STOP has been received.
Must be cleared by software.
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