參數(shù)資料
型號： TMX320DM647ZUT720
廠商： Texas Instruments, Inc.
英文描述： Digital Media Processor
中文描述： 數(shù)字媒體處理器
文件頁數(shù)： 85/166頁
文件大?。?/td> 1341K
代理商： TMX320DM647ZUT720
www.ti.com
P
6.7.4
System Reset
6.7.5
Peripheral Local Reset
6.7.6
Reset Priority
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
c.
The C64x+ begins executing from DSPBOOTADDR (determined by bootmode selection).
After the reset sequence, the boot sequence begins. Since the boot and configuration pins are not
latched with a max reset, the previous values (as shown in the BOOTCFG register) are used to
select
the
bootmode.
For
more
details
on
TMS320DM647/DM648 Bootloader Application Report
(literature number
SPRAAJ1
). After the boot
sequence, follow the software initialization sequence.
the
boot
sequence,
see
the
Using
the
A system reset maintains memory contents and does not reset the clock logic or the test and emulation
circuitry. The device configuration pins are also not re-latched and the state of the peripherals
(enabled/disabled) is also not affected. A system reset is initiated by the emulator or by the PRST pin of
PCI peripheral.
During a system reset, the following happens:
1. The RESETSTAT pin goes low to indicate an internal reset is being generated. The reset is allowed to
propagate through the system. Internal system clocks are not affected.
2. After the internal reset signal has propagated, the PLL controllers pause and restart their system
clocks for about 10 cycles of their system reference clocks, but retain their configuration. The PLLs
also remain locked.
3. The boot sequence is started after the system clocks are restarted. Since the configuration pins
(including the BOOTMODE[3:0] pins) are not latched with a system reset, the previous values, as
shown in the BOOTCFG register, are used to select the boot mode.
The user can configure the local reset and clock state of a peripheral through programming the PSC.
Table 6-2
identifies the LPSC numbers and the peripherals capable of being locally reset by the PSC. For
more
detailed
information
on
the
programming
TMS320DM647/TMS320DM648 DMP DSP Subsystem Reference Guide
(literature number
SPRUEU6
).
of
these
peripherals
by
the
PSC,
see
the
If any of the above reset sources occur simultaneously, the PLLCTRL processes only the highest priority
reset request. The reset request priorities are as follows (high to low):
Power-on Reset
Maximum Reset
Warm Reset
System Reset
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Peripheral Information and Electrical Specifications
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