參數(shù)資料
型號(hào): TMX320C6411AGLZ
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: FIXED POINT DIGITAL SIGNAL PROCESSOR
中文描述: 定點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù): 83/119頁
文件大?。?/td> 1742K
代理商: TMX320C6411AGLZ
SPRS196H MARCH 2002 REVISED JULY 2004
83
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
SYNCHRONOUS DRAM TIMING (CONTINUED)
ECLKOUTx
CEx
BE[3:0]
EA[12:3]
ED[31:0]
EA13
AOE/SDRAS/SOE
ARE/SDCAS/SADS/SRE
AWE/SDWE/SWE
EA[22:14]
BE1
BE2
BE3
BE4
Bank
Column
D1
D2
D3
D4
8
7
6
5
5
5
1
3
2
8
4
4
4
1
READ
PDT
14
14
PDTR/W
ARE/SDCAS/SADS/SRE, AWE/SDWE/SWE, and AOE/SDRAS/SOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM
accesses.
PDT signal is only asserted when the EDMA is in PDT mode (set the PDTS bit to 1 in the EDMA options parameter RAM). For PDT read, data
is not latched into EMIF. The PDTRL field in the PDT control register (PDTCTL) configures the latency of the PDT signal with respect to the data
phase of a read transaction. The latency of the PDT signal for a read can be programmed to 0, 1, 2, or 3 by setting PDTRL to 00, 01, 10, or 11,
respectively. PDTRL equals 00 (zero latency) in Figure 27.
Figure 27. SDRAM Read Command (CAS Latency 3)
相關(guān)PDF資料
PDF描述
TMX320C6411AZLZ FIXED POINT DIGITAL SIGNAL PROCESSOR
TMX320C6411GLZ FIXED POINT DIGITAL SIGNAL PROCESSOR
TMX320C6411ZLZ FIXED POINT DIGITAL SIGNAL PROCESSOR
TMX32C6411AGLZ FIXED POINT DIGITAL SIGNAL PROCESSOR
TMP32C6411AZLZ FIXED POINT DIGITAL SIGNAL PROCESSOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMX320C6411AZLZ 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED POINT DIGITAL SIGNAL PROCESSOR
TMX320C6411GLZ 制造商:Rochester Electronics LLC 功能描述:C6411 1V/300MHZ PROTOTYPES - Bulk 制造商:Texas Instruments 功能描述:
TMX320C6411GLZ300 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6411GLZ5E0 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6411GLZA300 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS