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參數(shù)資料
| 型號(hào)： | TMS3637DR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 搖控器 |
| 英文描述： | INFRARED, TRANSMITTER/RECEIVER IC, PDSO8 |
| 封裝： | PLASTIC, MS-012AA, SOIC-8 |
| 文件頁(yè)數(shù)： | 4/54頁(yè) |
| 文件大?。?/td> | 384K |
| 代理商： | TMS3637DR |
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2–3
2.4
Timing Requirements Over Recommended Ranges of Supply Voltages
and Free-Air Temperature
2.4.1
Abort/Retry
MIN
NOM
MAX
Time between consecutive codes
46 x tw (transmitter)
Time out for high-level bit to abort the code
3 x tw (receiver)
Time out for low-level bit to abort the code
25 x tw (receiver)
Time between aborted code and reading of new code
3 x tw (receiver)
2.4.2
EEPROM Read Mode (see Figure 3–3)
MIN
MAX
UNIT
tsu2
Setup time, OSCR high after VCC ↑
50
ms
tw4
Pulse width, OSCR high
10
s
tw5
Pulse width, OSCR low
10
s
2.4.3
EEPROM Write Mode (see Figure 3–3 and Figure 3–4)
MIN
MAX
UNIT
tsu3
Setup time, OSCR high after VCC high
50
ms
tw6
Pulse duration, OSCR high
5
s
tw7
Pulse duration, OSCR low
5
s
tv
Valid time, data IN valid before OSCC
↑
10
s
2.4.4
Data Input Setup and Hold Times (see Figure 3–5)
MIN
NOM
MAX
UNIT
tsu4
Setup time, data in before OSCR
↓
1
s
th1
Hold time, data in after OSCR
↓
1
s
2.5
Switching Characteristics Over Recommended Ranges of Supply
Voltages and Free-Air Temperature (unless otherwise noted)
2.5.1
Normal Transmission – Internal Clock (see Figure 3–6)
PARAMETER
MIN
TYP
MAX
UNIT
tw8
Pulse duration, half-oscillating period for OSCC sawtooth
↑↓
5
1/(2 x fosc)
100
s
tw9
Pulse duration, logic bit 1 for IN
5
tw
100
s
tw10
Pulse duration, logic bit 0 for IN
35
7 x tw
700
s
2.5.2
Modulated Transmission – Internal Clock
PARAMETER
TEST
CONDITIOINS
MIN
TYP
MAX
UNIT
fosc(t)
Transmitter oscillator frequency
100
110
120
kHz
fosc(r)
Receiver oscillator frequency
400
440
480
kHz
tw(H)
Pulse duration, high-level modulation at IN
See Figure 3-7
9
1/fosc(t)
10
s
tc
Cycle time, IN
See Figure 3-7
27
3 x tw(H)
30
s
tc(total) Total cycle time, IN
See Figure 3-7
135
5 x tc
150
s
tw11
Pulse duration, logic bit 1 for IN
See Figure 3-7
135
5 x tc
150
s
tw12
Pulse duration, logic bit 0 for IN
See Figure 3-7
945
7 x tw10
1050
s
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