參數(shù)資料
型號： TMS320C6713PYP150
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 32-BIT, 149.25 MHz, OTHER DSP, PQFP208
封裝： 28 X 28 MM, POWER, PLASTIC, QFP-208
文件頁數(shù)： 107/135頁
文件大小： 1868K
代理商： TMS320C6713PYP150
TMS320C6713
FLOATINGPOINT DIGITAL SIGNAL PROCESSOR
SPRS186B – DECEMBER 2001 – REVISED NOVEMBER 2002
73
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PLL and PLL controller (continued)
Table 35. PLL Clock Frequency Ranges
CLOCK SIGNAL
PYP-150
GDP-150
GDPA-TBD
GDP-225
PYP-150
GDP-150
GDP-225
GDPA-TBD
UNIT
MIN
MAX
PLLREF (PLLEN = 1)
12
100
MHz
PLLOUT
100
600
MHz
SYSCLK1
–
Device Speed (DSP Core)
MHz
SYSCLK2
–
always /2 of SYSCLK1
MHz
SYSCLK3 (EKSRC = 0)
–
66
100
MHz
Also see the electrical specification (timing requirements and switching characteristics parameters) in the input and output clocks section of this
data sheet.
The EMIF itself may be clocked by an external reference clock via the ECLKIN pin or can be generated on-chip
as SYSCLK3. SYSCLK3 is derived from divider D3 off of PLLOUT (see Figure 14, PLL and Clock Generator
Logic). The EMIF clock selection is programmable via the EKSRC bit in the DEVCFG register.
The settings for the PLL multiplier and each of the dividers in the clock generation block may be reconfigured
via software at run time. If either the input to the PLL changes due to D0, CLKMODE0, or CLKIN, or if the PLL
multiplier is changed, then software must enter bypass first and stay in bypass until the PLL has had enough
time to lock (see electrical specifications). For the programming procedure, see the TMS320C6000 DSP
Phase-Locked Loop (PLL) Controller Peripheral Reference Guide (literature number SPRU233).
SYSCLK2 is the internal clock source for peripheral bus control. SYSCLK2 (Divider D2) must be programmed
to be half of the SYSCLK1 rate. For example, if D1 is configured to divide-by-2 mode (/2), then D2 must be
programmed to divide-by-4 mode (/4). SYSCLK2 is also tied directly to CLKOUT2 pin (see Figure 14).
During the programming transition of Divider D1 and Divider D2 (resulting in SYSCLK1 and SYSCLK2 output
clocks, see Figure 14), the order of programming the PLLDIV1 and PLLDIV2 registers must be observed to
ensure that SYSCLK2 always runs at half the SYSCLK1 rate or slower. For example, if the divider ratios of D1
and D2 are to be changed from /1, /2 (respectively) to /5, /10 (respectively) then, the PLLDIV2 register must be
programmed before the PLLDIV1 register. The transition ratios become /1, /2; /1, /10; and then /5, /10. If the
divider ratios of D1 and D2 are to be changed from /3, /6 to /1, /2 then, the PLLDIV1 register must be programmed
before the PLLDIV2 register. The transition ratios, for this case, become /3, /6; /1, /6; and then /1, /2.
Note that Divider D1 and Divider D2 must always be enabled (i. e., D1EN and D2EN bits are set to “1” in the
PLLDIV1 and PLLDIV2 registers).
For detailed information on the clock generator (PLL Controller registers) and their associated software bit
descriptions, see Table 36 through Table 39.
PRODUCT
PREVIEW
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C6713PYP200 制造商:Texas Instruments 功能描述:
TMS320C6720BRFP200 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Floating-Point Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMS320C6722BRFP200 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Floating-Point Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMS320C6722BRFP250 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Floating-Point Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMS320C6722RFP200 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC FLOATING-PT DIG SIG PROC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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