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TMS28F004Axy, TMS28F400Axy
524288 BY 8-BIT/
262
144 BY 16-BIT
AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
SMJS829A – JANUARY 1996 – REVISED AUGUST 1997
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Organization . . .
524288 By 8 Bits
262144 By 16 Bits
Array-Blocking Architecture
– One 16K-Byte Protected Boot Block
– Two 8K-Byte Parameter Blocks
– One 96K-Byte Main Block
– Three 128K-Byte Main Blocks
– Top or Bottom Boot Locations
’28F400Axy Offers a User-Defined 8-Bit
(Byte) or 16-Bit (Word) Organization
’28F004Axy Offers Only the 8-Bit
Organization
Maximum Access/Minimum Cycle Time
– Commercial and Extended
5-V V
CC
±
10%
’28F400Axy60 60 ns
’28F400Axy70 70 ns
’28F400Axy80 80 ns
– Automotive (offered for only 5-V V
CC
voltage configurations)
5-V V
CC
±
10%
’28F400Axy70 70 ns
’28F400Axy80 80 ns
’28F400Axy90 90 ns
(x = S, E, F, M, or Z Depending on V
CC
/V
PP
Configuration)
(y = T or B for Top or Bottom Boot-Block
Configuration)
100000 and 10000 Program/Erase Cycle
Versions
Three Temperature Ranges
– Commercial . . . 0
°
C to 70
°
C
– Extended . . . – 40
°
C to 85
°
C
– Automotive . . . – 40
°
C to 125
°
C
Industry Standard Packages Offered in
– 40-Pin TSOP (DCD Suffix)
– 44-Pin PSOP (DBJ Suffix)
– 48-Pin TSOP (DCD Suffix)
Low Power Dissipation (V
CC
= 5.5 V)
– Active Write . . . 248 mW (Byte Write)
– Active Read . . . 330 mW (Byte Read)
– Active Write . . . 248 mW (Word Write)
– Active Read . . . 330 mW (Word Read)
– Block Erase . . . 165 mW
– Standby . . . 0.72 mW (CMOS-Input
Levels)
3.3-V V
CC
±
0.3 V
110 ns
130ns
150 ns
Fully Automated On-Chip Erase and
Word/Byte Program Operations
Write Protection for Boot Block
Industry Standard Command-State Machine
(CSM)
– Erase Suspend/Resume
– Algorithm-Selection Identifier
Three Different Combinations of Supply
Voltages Offered
All Inputs/Outputs TTL Compatible
23
V
CC
PIN NOMENCLATURE
A0–A17
BYTE
DQ0–DQ14 Data In/Out
DQ15/A–1
Address Inputs
Byte Enable
Data In/Out (word-wide mode),
Low-Order Address (byte-wide mode)
Chip Enable
Output Enable
No Internal Connection
Reset/Deep Power-Down
Power Supply
Power Supply for Program/Erase
Ground
Write Enable
Do Not Use for ’AMy or ’AZy /Write Protect
E
G
NC
RP
VCC
VPP
VSS
W
DU/WP
DBJ PACKAGE
(TOP VIEW)
V
PP
DU/WP
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
V
SS
G
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
RP
W
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
V
SS
DQ15/A
–1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1997, Texas Instruments Incorporated