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參數(shù)資料
| 型號： | TMDS3780513A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | TMS370 MICROCONTROLLER FAMILY DATA BOOK |
| 中文描述： | TMS370微控制器系列數(shù)據(jù)手冊 |
| 文件頁數(shù)： | 17/78頁 |
| 文件大小： | 919K |
| 代理商： | TMDS3780513A |
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TMS370 MAJOR COMPONENTS ARCHITECTURE
1–9
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
timer 1 (continued)
The results of these operations can generate an interrupt to the CPU, set flag bits, reset the timer counter, toggle
an I/O line, or generate PWM outputs. Timer 1 can provide up to 200 ns of resolution with a 5-MHz system clock
(SYSCLK).
timer 2n (A and B)
Timer 2A and 2B are 16-bit timers that can be configured in the following ways:
Four independent clock sources for the general-purpose timer
A
16-bit event timer, to keep a cumulative total of the transitions
A16-bit pulse accumulator, to measure the pulse-input width
Two 16-bit input-capture devices that change a counter value on the occurrence of an external input
Two 16-bit compare registers that trigger when a counter matches the contents of a compare register
A
self-contained PWM output controller
The results of the timer 2A and 2B operations can generate an interrupt to the CPU, set flag bits, reset the timer
counter, toggle an I/O line, or generate PWM outputs. Timers 2A and 2B can provide up to 200 ns of resolution
with a 5-MHz system clock (SYSCLK).
watchdog timer
The watchdog (WD) timer helps ensure system integrity. The WD timer can be programmed to generate a
hardware reset upon a time-out condition. The WD function provides a hardware monitor over the software to
help avoid losing a program. If not needed as a WD, this timer can be used as a general-purpose timer.
programmable acquisition and control timer (PACT)
The PACT module in the ’x32 and ’x36 subfamilies is a programmable timing module that uses some of the
on-chip RAM to store its commands and the timer values
.
Only the TMS370Cx36 device offers the 256-byte
standby RAM that protects stored data against power failures. The PACT module offers the following:
Input capture on up to six pins, four of which may have a programmable prescaler
One input-capture pin that can drive an 8-bit event counter
Up to eight timer-driven outputs
Timer capability of up to 20 bits
Interaction between event counter and timer activity
18 independent interrupt vectors to allow better servicing of events
Watchdog with selectable time-out period
Mini-SCI (serial communications interface) that works as a full duplex UART (universal asynchronous
receiver transmitter)
Once set up, the PACT requires no CPU overhead except to service interrupts.
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相關代理商/技術參數(shù) |
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