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參數(shù)資料
| 型號： | TMC3533R2C80 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | DAC |
| 英文描述： | Triple Video D/A Converter 8 bit, 80 Msps, 3.3V |
| 中文描述： | TRIPLE, PARALLEL, 8 BITS INPUT LOADING, 0.015 us SETTLING TIME, 8-BIT DAC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 68K |
| 代理商： | TMC3533R2C80 |
TMC3533
PRODUCT SPECIFICATION
8
REV. 0.9.1 11/24/99
Switching Characteristics
Notes:
1. Values shown in Typ column are typical for V
DD
= +3.3V and T
A
= 25°C.
2. V
REF
= 1.235V, R
LOAD
= 37.5
, R
REF
= 572
.
System Performance Characteristics
Notes:
1. Values shown in Typ column are typical for V
DD
= +3.3V and T
A
= 25°C.
2. V
REF
= 1.235V, R
LOAD
= 37.5
, R
REF
= 572
.
Timing Diagram
Parameter
t
D
t
SKEW
t
R
t
F
t
SET
Conditions
2
V
DD
= Min
Min
Typ
1
10
1
3
3
15
Max
15
2
4
4
Units
ns
ns
ns
ns
ns
Clock to Output Delay
Output Skew
Output Risetime
Output Falltime
Output Settling Time
10% to 90% of Full Scale
90% to 10% of Full Scale
to 3%/FS
Parameter
E
LI
E
LD
E
DM
I
OFF
Conditions
2
V
DD
, V
REF
= Nom
V
DD
, V
REF
= Nom
V
DD
, V
REF
= Nom
V
DD
= Max, R, G, B = 000h
SYNC = BLANK = 0
Min
Typ
1
±0.1
±0.1
7
Max
±0.25
±0.25
10
20
Units
%/FS
%/FS
%
nA
Integral Linearity Error
Differential Linearity Error
DAC to DAC Matching
Output Off Current
PSRR
Power Supply Rejection
Ratio
0.05
%/%
CLK
PIXEL DATA
& CONTROLS
OUTPUT
65-3503-04
DataN
DataN+1
DataN+2
tPWL
tS
tH
50%
3%/FS
90%
10%
tD
tSET
tF
tR
tPWH
1/fS
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