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參數(shù)資料
| 型號： | TMC3033R2C80 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | DAC |
| 英文描述： | Triple Video D/A Converter 10 bit, 80 Msps |
| 中文描述： | TRIPLE, PARALLEL, WORD INPUT LOADING, 0.015 us SETTLING TIME, 10-BIT DAC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 119K |
| 代理商： | TMC3033R2C80 |
TMC3033
PRODUCT SPECIFICATION
4
Pin Descriptions
Pin Name
Clock and Pixel I/O
CLK
Pin Number
PLCC
Value
Description
LQFP
29
26
TTL
Clock.
is registered on the rising edge of CLK. It is recommended
that CLK be driven by a dedicated TTL buffer to avoid
reflection induced jitter, overshoot, and undershoot.
Red pixel data inputs.
The Red digital input is TTL-
compatible and registered on the rising edge of CLK.
The clock input is TTL-compatible and all pixel data
R
9-0
5, 4, 3, 2, 1,
44, 43, 42,
41, 40
47, 46, 45,
44, 43, 42,
41, 40, 39,
38, 37
48, 9, 8, 7, 6,
5, 4, 3, 2, 1
TTL
G
9-0
15, 14, 13,
12, 11, 10, 9,
8, 7, 6
28, 27, 26,
25, 24, 23,
22, 21, 20,
19
TTL
Green pixel data inputs.
compatible and registered on the rising edge of CLK.
The Green digital input is TTL-
B
23, 22, 21,
20, 19, 18,
17, 16, 15,
14
TTL
Blue pixel data inputs.
compatible and registered on the rising edge of CLK.
The Blue digital input is TTL-
Controls
SYNC
17
11
TTL
Sync pulse Input.
IRE (7.62 mA) current source which forms a sync pulse on
the Green D/A converter output. SYNC is registered on the
rising edge of CLK along with pixel data and has the same
pipeline latency as BLANK and pixel data. SYNC does not
override any other data and should be used only during
the blanking interval.
Bringing SYNC LOW, turns off a 40
Since this is a single-supply D/A and all signals are
positive-going, sync is added to the bottom of the Green
D/A range. So turning SYNC OFF means turning the
current source ON. When a sync pulse is desired, the
current source is turned OFF. If the system does not
require sync pulses from the Green D/A converter, SYNC
should be connected to GND.
Blanking Input.
When BLANK is LOW, pixel inputs are
ignored and the D/A converter outputs are driven to the
blanking level. BLANK is registered on the rising edge of
CLK and has the same pipeline latency as SYNC.
BLANK
16
10
TTL
Video Outputs
IO
R
36
33
0.714 Vp-p
Red D/A output.
converters
compatible levels into doubly-terminated 75 Ohm lines.
Green D/A output.
The current source outputs of the D/A
converters
are capable of driving RS-343A/SMPTE-170M
compatible levels into doubly-terminated 75 Ohm lines.
Sync pulses may be added to the Green D/A output.
Blue D/A output.
The current source outputs of the D/A
converters
are capable of driving RS-343A/SMPTE-170M
compatible levels into doubly-terminated 75 Ohm lines.
The current source outputs of the D/A
are capable of driving RS-343A/SMPTE-170M
IO
G
35
32
1 V p-p
IO
B
32
29
0.714 Vp-p
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