![](http://datasheet.mmic.net.cn/370000/TMC22091KHC_datasheet_16742239/TMC22091KHC_9.png)
PRODUCT SPECIFICATION
TMC22091/TMC22191
9
CS
6
72
TTL
Chip Select.
When CS is HIGH, the microprocessor interface
port, D
7-0
, is set to HIGH impedance and ignored. When CS is
LOW, the microprocessor can read or write parameters over
D
7-0
. One additional falling edge of CS is needed to move input
data to its assigned working registers.
Bus Read/Write Control.
When R/W and CS are LOW, the
microprocessor can write to the control registers or CLUT over
D
7-0
. When R/W is HIGH and CS is LOW, it can read the
contents of any CLUT address or control register over D
7-0
.
Master Reset Input.
Bringing RESET LOW sets the software
reset control bit, SRESET, LOW, forcing the internal state
machines to their starting states and disabling all outputs.
Bringing RESET HIGH synchronizes the internal pixel clock
(PCK = PXCK / 2) to maintain a defined pipeline delay through
the TMC22x91. If HRESET is set HIGH, the encoder is enabled
when RESET goes HIGH. If HRESET is LOW, the host restarts
the TMC22x91 by setting SRESET HIGH. RESET does not
affect the CLUT or the control registers, except SRESET.
R/W
7
73
TTL
RESET
5
71
TTL
Video Output
COMPOSITE
33
2
1 V
P-P
NTSC/PAL Video.
Analog output of composite D/A converter,
nominally 1.35 volt peak-to-peak into a 37.5
load.
Luminance-only Video.
Analog output of luminance D/A
converter, nominally 1.35 volt peak-to-peak into a 37.5
load.
Chrominance-only Video.
Analog output of chrominance D/A
converter, nominally 1.35 volt peak-to-peak into a 37.5
load.
LUMA
35
5
1 V
P-P
CHROMA
37
8
1 V
P-P
Analog Interface
V
REF
30
98
+1.23 V
Voltage Reference Input.
External voltage reference input,
internal voltage reference output, nominally 1.235 V.
Compensation Capacitor.
Connection point for 0.1
μ
f
decoupling capacitor.
Current-setting Resistor.
Connection point for external
current-setting resistor for D/A converters. The resistor (392
)
is connected between R
REF
and A
GND
. Output video levels
are inversely proportional to the value of R
REF
.
COMP
39
10
0.1
μ
F
R
REF
31
99
392
JTAG Test Interface
TDI
TMS
25
24
93
92
TTL
TTL
Data Input Port.
Boundary scan data input port.
Scan Select Input.
Boundary scan (HIGH)/normal operation
(LOW) selector.
Scan Clock Input.
Boundary scan clock.
Data Output Port.
Boundary scan data output port.
TCK
TDO
Power Supply
V
DD
V
DDA
D
GND
23
22
91
90
TTL
TTL
27, 64, 81 41, 62, 95
40-43
10, 26, 65,
80
32, 34, 36,
38
+5 V
+5 V
0.0 V
Positive digital power supply.
Positive analog power supply.
Digital Ground.
13-17
42, 61, 76,
94
4, 6, 9,
100
A
GND
0.0 V
Analog Ground.
Pin Descriptions
(continued)
Pin Name
Pin Number
84-Lead
PLCC
Value
Pin Function Description
100-Lead
MQFP