參數(shù)資料
型號： TMC2193
廠商： Fairchild Semiconductor Corporation
英文描述： 10 Bit Encoder
中文描述： 10位編碼器
文件頁數(shù)： 34/72頁
文件大小： 448K
代理商： TMC2193
TMC2193
PRODUCT SPECIFICATION
34
REV. 1.0 3/26/03
sequence simply do not acknowledge (NOACK) the last byte
received and the TMC2193 will terminate the sequence.
A repeated start signal occurs when the master device driv-
ing the serial interface generates a start signal without first
generating a stop signal to terminate the current communica-
tion. This is used to change the mode of communication
(read, write) between the slave and master without releasing
the serial interface lines.
Figure 27. Serial Interface
–
Typical Byte Transfer
Figure 28. Serial Interface
–
Chip Address
Serial Interface Read/Write Examples
Write to one control register
Start signal
Slave Address byte (R/W bit = LOW)
Block Pointer (00)
Offset Pointer
Data byte to base address
Stop signal
Write to four consecutive control registers
Start signal
Slave Address byte (R/W bit = LOW)
Block Pointer (00)
Offset Pointer
Data byte to base address
Data byte to (base address + 1)
Data byte to (base address + 2)
Data byte to (base address + 3)
Stop signal
Write to one OLUT location
Start signal
Slave Address byte (R/W bit = LOW)
Block Pointer (01)
Offset Pointer (base address)
Data byte to base address (Y or Green)
Data byte to base address (Cb or Blue)
Data byte to base address (Cr or Red)
Stop signal
Write to four consecutive OLUT locations
Start signal
Slave Address byte (R/W bit = LOW)
Block Pointer (01)
Offset Pointer (base address)
Data byte to base address (Y or Green)
Data byte to base address (Cb or Blue)
Data byte to base address (Cr or Red)
Data byte to base address +1 (Y or Green)
Data byte to base address +1 (Cb or Blue)
Data byte to base address +1 (Cr or Red)
Data byte to base address +2 (Y or Green)
Data byte to base address +2 (Cb or Blue)
Data byte to base address +2 (Cr or Red)
Data byte to base address +3 (Y or Green)
Data byte to base address +3 (Cb or Blue)
Data byte to base address +3 (Cr or Red)
Stop signal
Read from one control register
Start signal
Slave Address byte (R/W bit = LOW)
Block Pointer (00)
Offset Pointer
Stop signal
Start signal
Slave Address byte (R/W bit = HIGH)
Data byte from base address
NOACK
SDA
65-6294-29
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ACK
SCL
SDA
65-6294-30
A
6
A
5
A
4
A
3
A
2
SA
1
SA
0
R/W
ACK
SCL
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