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參數(shù)資料
| 型號： | TLV5616C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN |
| 中文描述： | 2.7 V至5.5 V低功耗12位數(shù)字至模擬與電源降壓轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/23頁 |
| 文件大?。?/td> | 310K |
| 代理商： | TLV5616C |
TLV5616C, TLV5616I
2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG
CONVERTERS WITH POWER DOWN
SLAS152B – DECEMBER 1997 – REVISED MARCH 1999
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (V
DD
to AGND)
Reference input voltage range
Digital input voltage range
Operating free-air temperature range, T
A
: TLV5616C
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV5616I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
– 0.3 V to V
DD
+ 0.3 V
– 0.3 V to V
DD
+ 0.3 V
0
°
C to 70
°
C
–40
°
C to 85
°
C
–65
°
C to 150
°
C
260
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
4.5
NOM
MAX
5.5
UNIT
V
Supply voltage VDD
Supply voltage, VDD
VDD = 5 V
VDD = 3 V
VDD = 2.7 V to 5.5 V
VDD = 2.7 V to 5.5 V
VDD = 5 V (see Note 1)
VDD = 3 V (see Note 1)
5
2.7
3
3.3
V
High-level digital input voltage, VIH
Low-level digital input voltage, VIL
Reference voltage, Vref to REFIN terminal
Reference voltage, Vref to REFIN terminal
Load resistance, RL
Load capacitance, CL
Clock frequency, fCLK
2
V
0.8
V
AGND
2.048
VDD–1.5
VDD–1.5
V
AGND
1.024
V
k
pF
2
10
100
20
MHz
°
C
°
C
Operating free air temperature TA
Operating free-air temperature, TA
TLV5616C
0
70
TLV5616I
–40
85
NOTE 1: Due to the x2 output buffer, a reference input voltage
≥
VDD/2 causes clipping of the transfer function.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDD = 5 V, VREF = 2.048 V,
No load,
All inputs = AGND or VDD,
DAC latch = 0x800
Fast
0.9
1.35
mA
IDD
Power supply current
Slow
0.4
0.6
mA
VDD = 3 V, VREF = 1.024 V
No load,
All inputs = AGND or VDD,
DAC latch = 0x800
Fast
0.7
1.1
mA
Slow
0.3
0.45
mA
Power down supply current (see Figure 12)
10
nA
PSRR
Power supply rejection ratio
Zero scale
See Note 2
–80
dB
Full scale
See Note 3
–80
Power on threshold voltage, POR
2
V
NOTES:
2. Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) – EZS(VDDmin))/VDDmax]
3. Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) – EG(VDDmin))/VDDmax]
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