參數(shù)資料
型號(hào): TLV320AIC10C
廠商: Texas Instruments, Inc.
元件分類(lèi): Codec
英文描述: General-Purpose 3V to 5.5V 16-bit 22-KSPS DSP CODEC
中文描述: 通用3V至5.5V 16位22 kSPS的DSP的解碼器
文件頁(yè)數(shù): 24/57頁(yè)
文件大?。?/td> 284K
代理商: TLV320AIC10C
2–10
D0
16 SCLKs
… …
(SCLK)
(FS)
DIN/DOUT
(16-bit)
D1
MSB
LSB
D15
0
1
15
D14
… …
… …
14
SPICLK
SPISEL
Figure 2–11. Timing Diagram for the SPI_CP1 Mode (M1M0 = 10)
D0
16 SCLKs
… …
SCLK
FS
DIN/DOUT
(16-bit)
D1
MSB
LSB
D15
0
1
15
16
D14
… …
… …
14
Figure 2–12. Timing Diagram for the FS Frame Mode (M1M0 = 11)
NOTE: In frame mode, if AIC10 is in slave mode, DIN/DOUT should be delayed by one SCLK from the falling edge of FS.
2.7.1
Frame-Sync (FS) Function—Continuous-Transfer Mode (Master Only)
Writing a 1to bit D5 of control register 3 enables the continuous-transfer mode. In this mode, the data bits are
transmitted and received contiguously with no inactivity between bits at the very next FS, and no further frame sync
FSs are generated. Secondary communication is not available. To disable the continuous transfer mode, use the
direct-configuration mode (See section 3.3) or reset the device.
2.7.2
Frame-Sync (FS) Function—Fast-Transfer Mode (Slave Only)
By connecting the fast clock to the SCLK pin, data can be transmitted and received at a higher rate than 256 x Fs
in the slave mode for a stand-alone AIC10.
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