參數(shù)資料
型號: TLV1562CDW
廠商: Texas Instruments, Inc.
英文描述: 2.7 V TO 5.5 V, HIGH-SPEED LOW-POWER RECONFIGURABLE ANALOG-TO-DIGITAL CONVERTER WITH 4-INPUT, DUAL S/H, PARALLEL INTERFACE, AND POWER DOWN
中文描述: 2.7 V至5.5 V,高速低功耗可重構(gòu)模擬到數(shù)字轉(zhuǎn)換4輸入,雙的S /小時,并行接口,和電源關(guān)閉
文件頁數(shù): 13/40頁
文件大?。?/td> 578K
代理商: TLV1562CDW
TLV1562
2.7 V TO 5.5 V, HIGH-SPEED LOW-POWER RECONFIGURABLE ANALOG-TO-DIGITAL
CONVERTER WITH 4-INPUT, DUAL S/H, PARALLEL INTERFACE, AND POWER DOWN
SLAS162 – SEPTEMBER 1998
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
Table 3. Maximum Conversion Speed (for 1 LSB INL and DNL at 10 bit)
MAXIMUM CONVERSION THROUGHPUT
CONVERSION MODE
CR0.(3,2)
EXTERNAL CLOCK
(10 MHz)
INTERNAL CLOCK
(8 MHz)
RD
1.5 MSPS
1.1 MSPS
Mono interrupt driven conversion mode
Mono interrupt-driven conversion mode
RD with auto power down
00
0.82 MSPS
0.68 MSPS
CSTART
1.5 MSPS
1.1 MSPS
CSTART with auto power down
0.82 MSPS
0.68 MSPS
Dual interrupt driven conversion mode
Dual interrupt-driven conversion mode
CSTART
01
1.5 MSPS
0.91 MSPS
CSTART with auto power down
1.05 MSPS
2 MSPS§
2 MSPS
0.83 MSPS
1.33 MSPS§
1.33 MSPS
Mono continuous conversion mode
RD
10
Dual continuous conversion mode
Speed is calculated for 5-V with a 2-V reference
(5.5 V to 3 V, I-temperature and C-temperature: 2 MSPS at 10 bit, 3 MSPS at 8 bit, 7 MSPS at 4 bit;
3 V to 2.7 V, C-temperature: 2 MSPS at 10 bit, 2.5 MSPS at 8 bit, 7 MSPS at 4 bit;
3 V to 2.7 V, I-temperature: 1.6 MSPS at 10 bit, 2.5 MSPS at 8 bit, 7 MSPS at 4 bit).
Higher throughput is possible when the linearity requirement is relaxed.
Dual interrupt mode is available to 8-bit or 10-bit resolution and single-ended input type.
§Throughput from single selected channel.
Combined throughputs from a pair of selected channels.
RD
11
RD-Strobe
Mono Interrupt Mode: 0 RD-Delay
Mono Continuous Mode : 1 RD-Delay
Dual Continuous Mode : 2~3 RD-Delay
Dual Interrupt Mode: 0~1 RD-Delay
Conversion Results
Conversion Start
Figure 10. Digital Delays for Different Conversion Modes
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