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參數(shù)資料
| 型號(hào)： | TLE6236G |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Smart Octal Low-Side Switch |
| 中文描述： | 智能八路低端開關(guān) |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 526K |
| 代理商： | TLE6236G |
Datasheet TLE 6236 G
V2.1
Page
26.Aug. 2002
9
SO
- Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant
bit first. SO is in a high impedance state until the
CS
pin goes to a logic low state. New diag-
nostic data will appear at the SO pin following the rising edge of SCLK.
RESET
- Reset pin. If the reset pin is in a logic low state, it clears the SPI shift register and
switches all outputs OFF. An internal pull-up structure is provided on chip.
Diagnostics
FAULT
- Fault pin. There is a general fault pin (open drain) which shows a high to low transi-
tion as soon as an error occurs for any one of the eight channels. This fault indication can be
used to generate a μC interrupt. Therefore a ‘diagnosis’ interrupt routine need only be called
after this fault indication. This saves processor time compared to a cyclic reading of the SO
information.
As soon as a fault occurs, the fault information is latched into the diagnosis register. Serial
data out pin (SO) is in a high impedance state when
CS
is high. If
CS
receives a LOW signal,
all diagnosis bits can be shifted out serially. The rising edge of
CS
will reset all error registers.
Logic table
Parallel
Input
SI Bits
0-7
SO DIAG-
Bits 0-7
Output State
Output voltage
V
OUT
Operating Mode
1
L
L
L
OFF
>Vref
normal function
2
L
H
H
ON
< Vref
normal function
3
H
L
L
ON
< Vref
normal function
4
H
H
H
ON
< Vref
normal function
5
L
L
H
OFF
< Vref
open load/short to gnd
6
L
H
L
ON
>Vref
overload
7
H
L
H
ON
>Vref
overload
8
H
H
L
ON
>Vref
overload
Table 1:
Definition of diagnostic bits under parallel and serial control
Basic principle of fault detection:
SO Bit = SI Bit:
SO Bit inverse to SI Bit :
Normal Function
Fault Condition
The diagnostic bits DIAG0 to DIAG3 for channel 1 to 4 indicate a fault when the DIAG bit is
high during parallel control (IN1 .. IN4 = H; serial data bits 0 .. 3 = L). Note that the SPI serial
input (SI) bit overrides the ON state control from IN1 to IN4 regarding diagnostic information.
Compare DIAG Bit in line 3 (parallel ON only) with DIAG Bit in line 4 (serial and parallel ON)
under normal function.
Compare DIAG Bit in line 7 (parallel ON only) with DIAG Bit in line 8 (serial and parallel ON)
under fault condition.
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