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參數(shù)資料
| 型號： | TLC549IPSRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | GREEN, PLASTIC, SOP-8 |
| 文件頁數(shù)： | 15/18頁 |
| 文件大?。?/td> | 518K |
| 代理商： | TLC549IPSRG4 |
TLC548C, TLC548I, TLC549C, TLC549I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL
SLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 1996
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
See Note B
0.4 V
2.4 V
tf(bus)
Output
tr(bus)
0.8 V
2.4 V
0.8 V
td
DATA OUT
VOLTAGE WAVEFORMS FOR RISE AND FALL TIMES
VOLTAGE WAVEFORMS FOR DELAY TIME
VCC
3 k
3 k
VCC
See Note B
50%
0 V
tPLZ
I/O CLOCK
VOLTAGE WAVEFORMS FOR ENABLE AND DISABLE TIMES
Output Waveform 1
(see Note C)
tPHZ
VOH
90%
10%
tPZL
0 V
VCC
50%
CS
LOAD CIRCUIT FOR
tPZL AND tPLZ
LOAD CIRCUIT FOR
tPZH AND tPHZ
LOAD CIRCUIT FOR
td, tr, AND tf
See Note B
Output
Under Test
Test
Point
3 k
1.4 V
Output Waveform 2
(see Note C)
CL
(see Note A)
Output
Under Test
Test
Point
CL
(see Note A)
Output
Under Test
Test
Point
CL
(see Note A)
tPZH
50%
NOTES: A. CL = 50 pF for TLC548 and 100 pF for TLC549; CL includes jig capacitance.
B. ten = tPZH or tPZL, tdis = tPHZ or tPLZ.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
Figure 1. Load Circuits and Voltage Waveforms
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