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參數(shù)資料
| 型號： | TLC34076-85 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Color-Palette(85MHz,與TLC34075兼容，另具24位和16位真彩色模式) |
| 中文描述： | 顏色調(diào)色板（85MHz，與TLC34075兼容，另具24位和16位真彩色模式） |
| 文件頁數(shù)： | 26/56頁 |
| 文件大?。?/td> | 419K |
| 代理商： | TLC34076-85 |
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2-14
2.4.6
The read mask register is used to enable or disable a pixel address bit from addressing the color palette
RAM. Each palette address bit is logically ANDed with the corresponding bit from the read mask register
before addressing the palette. This function is performed after the addition of the page register bits and,
therefore, a zeroing of the read mask results in one unique palette location (location 0) and is not affected
by the palette page register contents.
Note also that the Read Mask can be used to zero the overlay data in the True Color modes. This is a handy
way to disable overlay (enable True Color data to the DACs) for a whole screen.
2.5
Reset
There are three ways to reset the TLC34076:
1.
Power-on reset
2.
Hardware reset
3.
Software reset
2.5.1
Power-On Reset
There is a POR (Power-On Reset) circuit built into the TLC34076. This POR words at power-on only. Even
though this circuitry is provided, it is still recommended for the user to design a hardware reset circuit to
ensure the reset condition after power-up as described in section 2.5.2.
Once the voltage is stabilized, the default condition for all registers is VGA mode. Note also that, when the
TLC34076 is reset, the SCLK and VCLK counters are reset as well. See 2.3 and 2.5.4.
2.5.2
Hardware Reset
The TLC34076 resets whenever RS<3:0> = HHHH and a rising edge occurs on the WR input. The more
rising WR edges occur, the more reliable the TLC34076 is reset. This scheme (bursting WR strobes until
the power supply voltage stabilizes) is suggested at power-up if a hardware reset approach is used.
The default reset condition is VGA mode, and the values for each register are shown in Section 2.5.4. Note
also that, when the TLC34076 is reset, the SCLK and VCLK counters are reset. See Section 2.3.
2.5.3
Software Reset
Whenever the mux control register is set for VGA pass-through mode after power-up, all registers are
initialized accordingly. Since VGA pass-through mode is the default condition at power-up and hardware
reset, the act of selecting the VGA pass-through mode through programming the mux control register is
viewed as a software reset. Therefore, whenever mux control register bits <5:0> are set to 2Dh, the
TLC34076 initiates a software reset. This also resets the SCLK and VCLK counters (see 2.3). This is
referred to as a software reset, since it is typically initiated by software, unlike POR or hardware resets.
2.5.4
VGA Pass-Through Mode Default Conditions
The value contained in each register after hardware or software reset is shown below:
Mux control register:
2Dh
Input clock selection register:
00h
Output clock selection register:
3Fh
Palette page register:
00h
General control register:
03h
Pixel read mask register:
FFh
Palette address register:
xxh
Palette holding register:
xxh
Test register:
(Pointing to color palette red value)
2.6
Frame Buffer Interface
The TLC34076 provides two clock signals for controlling the frame buffer interface: SCLK and VCLK. SCLK
can be used to clock out data directly from the VRAM shift registers. Split shift register transfer functionality
is also supported. VCLK is used to clock and synchronize control inputs like HSYNC, VSYNC, and BLANK.
Read Masking
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC34076-85FN | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TLC34077 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette Data Manual |
| TLC34077135FN | 制造商:TI 功能描述:* |
| TLC352 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LinCMOSE DUAL DIFFERENTIAL COMPARATOR |
| TLC352CD | 功能描述:校驗(yàn)器 IC Dual Differential RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
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