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參數(shù)資料
| 型號： | TL16C554I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ASYNCHRONOUS COMMUNICATIONS ELEMENT |
| 中文描述： | 異步通信元 |
| 文件頁數(shù)： | 19/33頁 |
| 文件大?。?/td> | 478K |
| 代理商： | TL16C554I |
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TL16C554, TL16C554I
ASYNCHRONOUS COMMUNICATIONS ELEMENT
SLLS165D – JANUARY 1994 – REVISED JULY 1998
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
interrupt enable register (IER) (continued)
Bit 0: When IER0 is set, IER0 enables the received data available interrupt and the timeout interrupts in
the FIFO mode.
Bit 1: When IER1 is set, the transmitter holding register empty interrupt is enabled.
Bit 2: When IER2 is set, the receiver line status interrupt is enabled.
Bit 3: When IER3 is set, the modem status interrupt is enabled.
Bits 4 – 7: IER4 – IER7. These four bits of the IER are cleared.
interrupt identification register (IIR)
In order to minimize software overhead during data character transfers, the serial channel prioritizes interrupts
into four levels. The four levels of interrupt conditions are as follows:
Priority 1 – Receiver line status (highest priority)
Priority 2 – Receiver data ready or receiver character timeout
Priority 3 –Transmitter holding register empty
Priority 4–Modem status (lowest priority)
Information indicating that a prioritized interrupt is pending and the type of interrupt that is stored in the IIR. The
IIR indicates the highest priority interrupt pending. The contents of the IIR are indicated in Table 5.
Table 5. Interrupt Control Functions
INTERRUPT
IDENTIFICATION
REGISTER
INTERRUPT SET AND RESET FUNCTIONS
BIT 3
BIT 2
BIT 1
BIT 0
PRIORITY
LEVEL
INTERRUPT TYPE
INTERRUPT SOURCE
INTERRUPT
RESET CONTROL
0
0
0
1
—
None
None
—
0
1
1
0
First
Receiver line status
OE, PE, FE, or BI
LSR read
0
1
0
0
Second
Received data available
Receiver data available or
trigger level reached
RBR read until FIFO
drops below the trigger
level
1
1
0
0
Second
Character time-out
indicator
No characters have been
removed from or input to the
receiver FIFO during the last
four character times, and there
is at least one character in it
during this time.
RBR read
0
0
1
0
Third
THRE
THRE
IIR read if THRE is the
interrupt source or THR
write
0
0
0
0
Fourth
Modem status
CTS, DSR, RI, or DCD
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TL16C554IFN | 功能描述:UART 接口集成電路 Quad UART with 16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C554IFNG4 | 功能描述:UART 接口集成電路 Quad UART w/16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C554IFNR | 功能描述:UART 接口集成電路 Quad UART with 16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C554IFNRG4 | 功能描述:UART 接口集成電路 Quad UART w/16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C554IPN | 功能描述:UART 接口集成電路 Qd UART w/16b FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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