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參數(shù)資料
| 型號(hào)： | TISP4A270H3BJ |
| 廠商： | BOURNS INC |
| 元件分類(lèi)： | 浪涌電流限制器 |
| 英文描述： | LCAS R LINE Protector |
| 中文描述： | 217 V, 60 A, SILICON SURGE PROTECTOR, DO-214AA |
| 封裝： | ROHS COMPLIANT, PLASTIC, SMB, 2 PIN |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大?。?/td> | 242K |
| 代理商： | TISP4A270H3BJ |
APRIL 2002 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A270H3BJ LCAS R
LINE
Protector
Electrical Characteristics, TA = 25
°
C (Unless Otherwise Noted)
Thermal Characteristics
Parameter
Test Conditions
Min
Typ
Max
Unit
R
Θ
JA
Junction to free air thermal resistance
EIA/JESD51-3 PCB, I
T
= I
TSM(1000)
,
T
A
= 25
°
C, (see Note 6)
265 mm x 210 mm populated line card,
4-layer PCB, I
T
= I
TSM(1000)
, T
A
= 25
°
C
113
°
C/W
50
NOTE 6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
Parameter
Repetitive peak off-
state current
Test Conditions
Min
Typ
Max
±
5
±
10
+217
-270
+231
-288
Unit
I
DRM
V
D
= +100 V and -200 V
T
A
= 25
°
C
T
A
= 85
°
C
μ
A
V
(BO)
Breakover voltage
dv/dt =
±
250 V/ms,
R
SOURCE
= 300
V
I
(BO)
I
H
Breakover current
Holding current
dv/dt =
±
250 V/ms,
I
T
=
±
5 A, di/dt = +/-30 mA/ms
R
SOURCE
= 300
±
0.15
±
0.15
±
0.6
±
0.6
A
A
dv/dt
Critical rate of rise of
off-state voltage
Off-state current
Linear voltage ramp, Maximum ramp value < 0.85V
DRM
±
5
kV/
μ
s
I
D
V
D
=
±
50 V
T
A
= 85
°
C
±
10
23
29
46
53
62
67
74
68
62
52
45
28
22
μ
A
C
off
Off-state capacitance
f = 1 MHz,
V
d
= 1 V rms
V
D
= 100 V
V
D
= 50 V
V
D
= 10 V
V
D
= 5 V
V
D
= 2 V
V
D
= 1 V
V
D
= 0
V
D
= -1 V
V
D
= -2 V
V
D
= -5 V
V
D
= -10 V
V
D
= -50 V
V
D
= -100 V
21
27
41
48
56
61
68
62
56
48
40
25
20
pF
.
V
(BO)
Ramp breakover
voltage
dv/dt
≤
±
1 kV/
μ
s, Linear voltage ramp, Maximum ramp value =
±
500 V
dv/dt =
±
20 A/
μ
s, Linear current ramp, Maximum ramp value =
±
10 A
V
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